Re: Disabling x86 System Management Mode

[John Sigler <linux.kernel@free.fr>]

Andi Kleen wrote:

> Modern x86 CPUs execute code out of order and in parallel.

I am aware of the (apparent) non-deterministic nature of
superscalar out-of-order speculative execution.

> The reordering window can be quite large and the CPU can execute code
> speculatively. This can add large errors to RDTSC when the 
> instruction is not executed where you think it is. One way around 
> this is to synchronize it -- using CPUID --

Your terminology is surprising. CPUID is commonly referred to as a
/serializing/ instruction.

> but that also adds latency and makes the measurement less precise.

Why would adding known latency make the measurement less precise?

What I needed was a block of code with consistent latency, whatever
the actual number.

Regards.