Re: [Qemu-devel] Re: [PATCH] x86_64 debug registers for gdb

[Jan Kiszka <jan.kiszka@web.de>]

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Paul Brook wrote:
> On Wednesday 18 April 2007 21:53, Jan Kiszka wrote:
>> Jason Wessel wrote:
>>> This patch fixes the registers for the 'g' and 'G' packets for the
>>> qemu-system-x86_64 target.  It allows gdb 6.5 to debug a linux kernel
>>> and get a stack back trace.
>> Here comes a corrected (RBX and RDX were mixed) and slightly enhanced
>> (segment register reading, don't know how writing should look like)
>> version of this patch. Tested successfully with qemu-0.9.0 and gdb-6.6.
>> Would be nice to see this support in the next qemu release.
> 
> Can't you recycle the i386 code, like other 64-bit targets do?
> 

For sure I can :). Is this version better? According to a quick check, it gives identical binaries on i386 and appears to work fine on x86_64.

Jan


---
 gdbstub.c |   99 ++++++++++++++++++++++++++++++++++++++------------------------
 1 file changed, 62 insertions(+), 37 deletions(-)

Index: qemu-0.9.0/gdbstub.c
===================================================================
--- qemu-0.9.0.orig/gdbstub.c
+++ qemu-0.9.0/gdbstub.c
@@ -223,63 +223,88 @@ static int put_packet(GDBState *s, char 
 
 #if defined(TARGET_I386)
 
+#if defined(TARGET_X86_64)
+#define _GP_REGS    16
+#define _FPCTL_OFS  34
+#define _NREGS      42
+#else /* i386 */
+#define _GP_REGS    8
+#define _FPCTL_OFS  36
+#define _NREGS      44
+#endif
+
 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 {
-    uint32_t *registers = (uint32_t *)mem_buf;
+    target_ulong *registers = (target_ulong *)mem_buf;
     int i, fpus;
 
-    for(i = 0; i < 8; i++) {
+    for(i = 0; i < _GP_REGS; i++)
         registers[i] = env->regs[i];
-    }
-    registers[8] = env->eip;
-    registers[9] = env->eflags;
-    registers[10] = env->segs[R_CS].selector;
-    registers[11] = env->segs[R_SS].selector;
-    registers[12] = env->segs[R_DS].selector;
-    registers[13] = env->segs[R_ES].selector;
-    registers[14] = env->segs[R_FS].selector;
-    registers[15] = env->segs[R_GS].selector;
+#if defined(TARGET_X86_64)
+    /* Fix-up register mapping */
+    registers[1] = env->regs[R_EBX];
+    registers[2] = env->regs[R_ECX];
+    registers[3] = env->regs[R_EDX];
+#endif
+
+    registers[_GP_REGS]   = env->eip;
+    registers[_GP_REGS+1] = env->eflags;
+
+    registers[_GP_REGS+2] = env->segs[R_CS].selector;
+    registers[_GP_REGS+3] = env->segs[R_SS].selector;
+    registers[_GP_REGS+4] = env->segs[R_DS].selector;
+    registers[_GP_REGS+5] = env->segs[R_ES].selector;
+    registers[_GP_REGS+6] = env->segs[R_FS].selector;
+    registers[_GP_REGS+7] = env->segs[R_GS].selector;
+
     /* XXX: convert floats */
-    for(i = 0; i < 8; i++) {
-        memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
-    }
-    registers[36] = env->fpuc;
+    for (i = 0; i < 8; i++)
+        memcpy(mem_buf + (_GP_REGS+8) * sizeof(target_ulong) + i * 10,
+               &env->fpregs[i], 10);
+
+    registers[_FPCTL_OFS] = env->fpuc;
     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
-    registers[37] = fpus;
-    registers[38] = 0; /* XXX: convert tags */
-    registers[39] = 0; /* fiseg */
-    registers[40] = 0; /* fioff */
-    registers[41] = 0; /* foseg */
-    registers[42] = 0; /* fooff */
-    registers[43] = 0; /* fop */
-    
-    for(i = 0; i < 16; i++)
+    registers[_FPCTL_OFS+1] = fpus;
+    registers[_FPCTL_OFS+2] = 0; /* XXX: convert tags */
+    registers[_FPCTL_OFS+3] = 0; /* fiseg */
+    registers[_FPCTL_OFS+4] = 0; /* fioff */
+    registers[_FPCTL_OFS+5] = 0; /* foseg */
+    registers[_FPCTL_OFS+6] = 0; /* fooff */
+    registers[_FPCTL_OFS+7] = 0; /* fop */
+
+    for (i = 0; i < _GP_REGS+8; i++)
         tswapls(&registers[i]);
-    for(i = 36; i < 44; i++)
+    for (i = _FPCTL_OFS; i < _FPCTL_OFS+8; i++)
         tswapls(&registers[i]);
-    return 44 * 4;
+    return _NREGS * sizeof(target_ulong);
 }
 
 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 {
-    uint32_t *registers = (uint32_t *)mem_buf;
+    target_ulong *registers = (target_ulong *)mem_buf;
     int i;
 
-    for(i = 0; i < 8; i++) {
+    for(i = 0; i < _GP_REGS; i++)
         env->regs[i] = tswapl(registers[i]);
-    }
-    env->eip = tswapl(registers[8]);
-    env->eflags = tswapl(registers[9]);
+#if defined(TARGET_X86_64)
+    /* Fix-up register mapping */
+    env->regs[R_EBX] = tswapl(registers[1]);
+    env->regs[R_ECX] = tswapl(registers[2]);
+    env->regs[R_EDX] = tswapl(registers[3]);
+#endif
+
+    env->eip = tswapl(registers[_GP_REGS]);
+    env->eflags = tswapl(registers[_GP_REGS+1]);
 #if defined(CONFIG_USER_ONLY)
 #define LOAD_SEG(index, sreg)\
             if (tswapl(registers[index]) != env->segs[sreg].selector)\
                 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
-            LOAD_SEG(10, R_CS);
-            LOAD_SEG(11, R_SS);
-            LOAD_SEG(12, R_DS);
-            LOAD_SEG(13, R_ES);
-            LOAD_SEG(14, R_FS);
-            LOAD_SEG(15, R_GS);
+            LOAD_SEG(_GP_REGS+2, R_CS);
+            LOAD_SEG(_GP_REGS+3, R_SS);
+            LOAD_SEG(_GP_REGS+4, R_DS);
+            LOAD_SEG(_GP_REGS+5, R_ES);
+            LOAD_SEG(_GP_REGS+6, R_FS);
+            LOAD_SEG(_GP_REGS+7, R_GS);
 #endif
 }
 


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