From: Timur Tabi <timur@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] MPC8347/9 stack in cache (CFG_INIT_RAM_ADDR)
Date: Tue, 24 Apr 2007 09:56:15 -0500 [thread overview]
Message-ID: <462E1A8F.2050908@freescale.com> (raw)
In-Reply-To: <462D8C5E.3070001@nec.com.au>
Matt Hevern wrote:
> Is anyone more familar with this or suggestions?
Well, I should be more familiar, since I wrote the support for the MPC8349E-mITX, but
honestly I just diddled with the values until I got something working.
Have you taken a look at the latest MPC8349ITX.h? I went through a lot of effort to make
that file as "intelligent" as possible.
I have this:
#define CFG_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */
/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
#define CFG_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
#define CFG_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
Maybe you BAT window is too small?
--
Timur Tabi
Linux Kernel Developer @ Freescale
prev parent reply other threads:[~2007-04-24 14:56 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-04-24 4:49 [U-Boot-Users] MPC8347/9 stack in cache (CFG_INIT_RAM_ADDR) Matt Hevern
2007-04-24 14:56 ` Timur Tabi [this message]
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