From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from buildserver.ru.mvista.com (unknown [85.21.88.6]) by ozlabs.org (Postfix) with ESMTP id 579B8DDF51 for ; Fri, 15 Jun 2007 19:34:30 +1000 (EST) Message-ID: <46725D02.9090806@ru.mvista.com> Date: Fri, 15 Jun 2007 13:33:54 +0400 From: "Vladislav D. Buzov" MIME-Version: 1.0 To: Segher Boessenkool Subject: Re: [RFC/PATCH] powerpc: MPC7450 L2 HW cache flush feature utilization References: <1181729973.25586.31.camel@dolphin.spb.rtsoft.ru> <467176EB.7060404@ru.mvista.com> <20070614222620.GA17382@mag.az.mvista.com> <46725411.3080002@ru.mvista.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Cc: linuxppc-dev list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Segher Boessenkool wrote: >> Hrm. I don't think that cache invalidation should be skipped. It is >> done after _set_L2CR() explicitly disabled the cache, in part of >> cache enabling procedure. Note that cache is flushed only if >> _set_L2CR() is called for already enabled cache. So, to skip cache >> invalidation there is a need to somehow track whether the cache has >> been flushed/invalidated before disabling or not. Since the manual >> invalidation does not break anything I think it is better to leave it >> as is rather than overload a _set_L2CR() logic. > > Yeah just leave it, it definitely is the safer thing to do. > Do fix the comment though ;-) Once somebody tests the patch on other 7450 processors I'll remove the comment and send a new patch. Is it ok? Or I should create a new patch first? Vlad. > > > Segher >