From: Sergei Shtylyov <sshtylyov@ru.mvista.com>
To: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: "Maciej W. Rozycki" <macro@linux-mips.org>,
Ralf Baechle <ralf@linux-mips.org>,
linux-mips@linux-mips.org
Subject: Re: Modpost warning on Alchemy
Date: Wed, 01 Aug 2007 20:01:40 +0400 [thread overview]
Message-ID: <46B0AE64.7060004@ru.mvista.com> (raw)
In-Reply-To: <20070801165812.3bdb269f@the-village.bc.nu>
Alan Cox wrote:
>>>> Even on a CPU with 36-bit physical address? ;-)
>>>Nope. This is one problem for example with ioremap on a Pentium Pro.
>> Well, but we only consider MIPS processors here which do not have such
>>odd restrictions resulting from bad design decisions in the past. ;-)
>>The 32-bit TLB entry format allows for up to 36 bits of the physical
>>address space (34 bits if support for the page size of 1kB has been
> So does the Pentium Pro. We can map 36bit physical addresses.
>>enabled). For anything beyond that you need a 64-bit MIPS processor using
>>the 64-bit TLB entry format.
> Your problem is a little higher up the stack. ioremap takes an unsigned
> long, which on a 32bit system usually means you can't give it a 36bit bus
> address to remap.
It takes phys_t, which is 'unsigned long long' for this platform that has
CONFIG_64BUIT_PHYS_ADDR=y. The reall issue is the size.
> Alan
WBR, Sergei
prev parent reply other threads:[~2007-08-01 16:00 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-08-01 11:52 Modpost warning on Alchemy Ralf Baechle
2007-08-01 12:23 ` Sergei Shtylyov
2007-08-01 12:53 ` Maciej W. Rozycki
2007-08-01 13:13 ` Sergei Shtylyov
2007-08-01 13:18 ` Sergei Shtylyov
2007-08-01 15:38 ` Maciej W. Rozycki
2007-08-01 15:44 ` Sergei Shtylyov
2007-08-01 16:26 ` Maciej W. Rozycki
2007-08-01 16:37 ` Sergei Shtylyov
2007-08-01 16:54 ` Maciej W. Rozycki
2007-08-01 17:06 ` Sergei Shtylyov
2007-08-02 9:14 ` Maciej W. Rozycki
2007-08-02 12:49 ` Sergei Shtylyov
2007-08-02 13:27 ` Maciej W. Rozycki
2007-08-02 14:15 ` Sergei Shtylyov
2007-08-02 14:33 ` Maciej W. Rozycki
2007-08-01 17:10 ` Alan Cox
2007-08-02 9:24 ` Maciej W. Rozycki
2007-08-01 17:09 ` Sergei Shtylyov
2007-08-02 9:39 ` Maciej W. Rozycki
2007-08-02 10:15 ` Ralf Baechle
2007-08-02 10:17 ` Maciej W. Rozycki
2007-08-02 12:53 ` Sergei Shtylyov
2007-08-02 13:00 ` Sergei Shtylyov
2007-08-02 13:35 ` Maciej W. Rozycki
2007-08-02 14:10 ` Sergei Shtylyov
2007-08-02 14:21 ` Maciej W. Rozycki
2007-08-01 15:39 ` Alan Cox
2007-08-01 15:49 ` Maciej W. Rozycki
2007-08-01 15:58 ` Alan Cox
2007-08-01 16:00 ` Maciej W. Rozycki
2007-08-01 16:21 ` Ralf Baechle
2007-08-01 16:33 ` Maciej W. Rozycki
2007-08-02 9:25 ` Ralf Baechle
2007-08-02 9:44 ` Maciej W. Rozycki
2007-08-01 16:01 ` Sergei Shtylyov [this message]
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