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From: Tejun Heo <htejun@gmail.com>
To: "Gaston, Jason D" <jason.d.gaston@intel.com>
Cc: linux-ide@vger.kernel.org
Subject: Re: ICH9 2 port SATA controller port map?
Date: Fri, 28 Sep 2007 22:16:21 -0700	[thread overview]
Message-ID: <46FDDFA5.8040209@gmail.com> (raw)
In-Reply-To: <39B20DF628532344BC7A2692CB6AEE0701CF2D29@orsmsx420.amr.corp.intel.com>

Gaston, Jason D wrote:
>> -----Original Message-----
>> From: Tejun Heo [mailto:htejun@gmail.com]
>> Sent: Wednesday, September 26, 2007 6:08 PM
>> To: Gaston, Jason D
>> Cc: linux-ide@vger.kernel.org
>> Subject: Re: ICH9 2 port SATA controller port map?
>>
>> Gaston, Jason D wrote:
>>> Hello,
>>>
>>> ICH9 has DeviceID's for 2 port, IDE mode, SATA controllers.  The
> current
>>> port map in ata_piix is setup for the 4 port controllers.  This seems
> to
>>> work ok, but I wonder if a new port map should be defined for the 2
> port
>>> controllers, where the two ports are PM, SM?  You can refer to the
> ICH9
>>> Datasheet on intel.com for detail.
>> Yes, please go ahead and define new entry for the controllers.  Thanks.
>>
>> --
>> Tejun
> 
> What is the difference between NA and RV?  If the controller only has
> access to 2 ports, does it matter which I set the nonexistent port
> values to in the map?

NA is used for unimplemented ports of a valid configuration while RV is
used to mark invalid MAP value.  So, NA should be mixed with P[0-3]
while RV can't be mixed with any other values.

-- 
tejun

  reply	other threads:[~2007-09-29  5:18 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-09-24 20:36 ICH9 2 port SATA controller port map? Gaston, Jason D
2007-09-27  1:08 ` Tejun Heo
2007-09-28 23:57   ` Gaston, Jason D
2007-09-29  5:16     ` Tejun Heo [this message]
2007-10-01 17:33       ` Gaston, Jason D
2007-10-02  7:57         ` Tejun Heo

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