From: David Hildenbrand <david@redhat.com>
To: "Christian König" <christian.koenig@amd.com>,
intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
x86@kernel.org
Cc: airlied@gmail.com, thomas.hellstrom@linux.intel.com,
matthew.brost@intel.com, dave.hansen@linux.intel.com,
luto@kernel.org, peterz@infradead.org,
Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
Subject: Re: stupid and complicated PAT :)
Date: Fri, 29 Aug 2025 21:58:40 +0200 [thread overview]
Message-ID: <46b99b0f-688d-4625-8b68-8176185ced43@redhat.com> (raw)
In-Reply-To: <4ef6e251-37c2-47ac-bff7-3b2a7d7e58d6@redhat.com>
On 29.08.25 21:52, David Hildenbrand wrote:
>
>>
>> Yes, that can absolutely happen. But for iomem we would have an explicit call to ioremap(), ioremap_wc(), ioremap_cache() for that before anybody would map anything into userspace page tables.
>>
>> But thinking more about it I just had an OMFG moment! Is it possible that the PAT currently already has a problem with that?
>>
>> We had customer projects where BARs of different PCIe devices ended up on different physical addresses after a hot remove/re-add.
>>
>> Is it possible that the PAT keeps enforcing certain caching attributes for a physical address? E.g. for example because a driver doesn't clean up properly on hot remove?
>>
>> If yes than that would explain a massive number of problems we had with hot add/remove.
>
> The code is a mess, so if a driver messed up, likely everything is possible.
>
> TBH, the more I look at this all, the more WTF moments I am having.
>
>>
>>>> What I am currently wondering is: assume we get a
>>>> pfnmap_setup_cachemode_pfn() call and we could reliably identify whether
>>>> there was a previous registration, then we could do
>>>>
>>>> (a) No previous registration: don't modify pgprot. Hopefully the driver
>>>> knows what it is doing. Maybe we can add sanity checks that the
>>>> direct map was already updated etc.
>>>> (b) A previous registration: modify pgprot like we do today.
>>
>> That would work for me.
>>
>>>> System RAM is the problem. I wonder how many of these registrations we
>>>> really get and if we could just store them in the same tree as !system
>>>> RAM instead of abusing page flags.
>>>
>>> commit 9542ada803198e6eba29d3289abb39ea82047b92
>>> Author: Suresh Siddha <suresh.b.siddha@intel.com>
>>> Date: Wed Sep 24 08:53:33 2008 -0700
>>>
>>> x86: track memtype for RAM in page struct
>>> Track the memtype for RAM pages in page struct instead of using the
>>> memtype list. This avoids the explosion in the number of entries in
>>> memtype list (of the order of 20,000 with AGP) and makes the PAT
>>> tracking simpler.
>>> We are using PG_arch_1 bit in page->flags.
>>> We still use the memtype list for non RAM pages.
>>>
>>>
>>> I do wonder if that explosion is still an issue today.
>>
>> Yes it is. That is exactly the issue I'm working on here.
>>
>> It's just that AGP was replaced by internal GPU MMUs over time and so we don't use the old AGP code any more but just call get_free_pages() (or similar) directly.
>
> Okay, I thought I slowly understood how it works, then I stumbled over
> the set_memory_uc / set_memory_wc implementation and now I am *all
> confused*.
>
> I mean, that does perform a PAT reservation.
>
> But when is that reservation ever freed again? :/
Ah, set_memory_wb() does that. It just frees stuff. It should have been
called something like "reset", probably.
--
Cheers
David / dhildenb
next prev parent reply other threads:[~2025-08-30 16:16 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-20 14:33 Christian König
2025-08-20 14:33 ` [PATCH 1/3] drm/ttm: use apply_page_range instead of vmf_insert_pfn_prot Christian König
2025-08-20 14:33 ` [PATCH 2/3] drm/ttm: reapply increase ttm pre-fault value to PMD size" Christian König
2025-08-20 14:33 ` [PATCH 3/3] drm/ttm: disable changing the global caching flags on newer AMD CPUs v2 Christian König
2025-08-20 15:12 ` Borislav Petkov
2025-08-20 15:23 ` David Hildenbrand
2025-08-21 8:10 ` Re: Christian König
2025-08-25 19:10 ` Re: David Hildenbrand
2025-08-26 8:38 ` Re: Christian König
2025-08-26 8:46 ` Re: David Hildenbrand
2025-08-26 9:00 ` Re: Christian König
2025-08-26 9:17 ` Re: David Hildenbrand
2025-08-26 9:56 ` Re: Christian König
2025-08-26 12:07 ` Re: David Hildenbrand
2025-08-26 16:09 ` Re: Christian König
2025-08-27 9:13 ` [PATCH 0/3] drm/ttm: Michel Dänzer
2025-08-28 21:18 ` stupid and complicated PAT :) David Hildenbrand
2025-08-28 21:28 ` David Hildenbrand
2025-08-28 21:32 ` David Hildenbrand
2025-08-29 10:50 ` Christian König
2025-08-29 19:52 ` David Hildenbrand
2025-08-29 19:58 ` David Hildenbrand [this message]
2025-08-26 14:27 ` Thomas Hellström
2025-08-28 21:01 ` stupid PAT :) David Hildenbrand
2025-08-26 12:37 ` David Hildenbrand
2025-08-21 9:16 ` your mail Lorenzo Stoakes
2025-08-21 9:30 ` David Hildenbrand
2025-08-21 10:05 ` Lorenzo Stoakes
2025-08-21 10:16 ` David Hildenbrand
2025-08-25 18:35 ` Christian König
2025-08-25 19:20 ` David Hildenbrand
2025-08-21 8:19 ` ✗ i915.CI.BAT: failure for series starting with [1/3] drm/ttm: use apply_page_range instead of vmf_insert_pfn_prot Patchwork
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