From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Ih9CO-0003P5-Cm for qemu-devel@nongnu.org; Sun, 14 Oct 2007 15:32:28 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Ih9CM-0003NC-SB for qemu-devel@nongnu.org; Sun, 14 Oct 2007 15:32:27 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Ih9CM-0003Mx-KI for qemu-devel@nongnu.org; Sun, 14 Oct 2007 15:32:26 -0400 Received: from pop-knobcone.atl.sa.earthlink.net ([207.69.195.64]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Ih9CM-00070F-LB for qemu-devel@nongnu.org; Sun, 14 Oct 2007 15:32:26 -0400 Received: from user-142h2k8.cable.mindspring.com ([72.40.138.136] helo=earthlink.net) by pop-knobcone.atl.sa.earthlink.net with esmtp (Exim 3.36 #1) id 1Ih9CL-0007Yi-00 for qemu-devel@nongnu.org; Sun, 14 Oct 2007 15:32:25 -0400 Message-ID: <47126EC9.8000406@earthlink.net> Date: Sun, 14 Oct 2007 15:32:25 -0400 From: Robert Reif MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH] sparc32 use stq_* for 64bit stores References: <4712614B.9050908@earthlink.net> In-Reply-To: Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Blue Swirl wrote: >On 10/14/07, Robert Reif wrote: > > >>Should the address be 64 bit alligned? i.e. T0 & ~7 rather than T0 & ~3? >> >>Should these unaligned address cause traps? >> >> > >Yes, but the checks are already generated from translate.c >(gen_op_check_align_T0_7). > > De we to align then again?