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From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [v2] drm/i915/display/fbc: Disable fbc by default on TGL
Date: Tue, 28 Jul 2020 08:21:26 +0000	[thread overview]
Message-ID: <472522150c534a8aba4b3b0a69fc60df@intel.com> (raw)
In-Reply-To: <20200716144446.GW6112@intel.com>



> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Thursday, July 16, 2020 8:15 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; Lisovskiy, Stanislav
> <stanislav.lisovskiy@intel.com>
> Subject: Re: [v2] drm/i915/display/fbc: Disable fbc by default on TGL
> 
> On Thu, Jul 16, 2020 at 08:28:57PM +0530, Uma Shankar wrote:
> > Fbc is causing random underruns in CI execution on TGL platforms.
> > Disabling the same while the problem is being debugged and analyzed.
> >
> > v2: Moved the check below the module param check (Ville)
> >
> > Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> 
> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

This is pushed to dinq. Thanks for the review.

Regards,
Uma Shankar

> > ---
> >  drivers/gpu/drm/i915/display/intel_fbc.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 3a4f980788a6..195b8be4532a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -1426,6 +1426,13 @@ static int intel_sanitize_fbc_option(struct
> drm_i915_private *dev_priv)
> >  	if (!HAS_FBC(dev_priv))
> >  		return 0;
> >
> > +	/*
> > +	 * Fbc is causing random underruns in CI execution on TGL platforms.
> > +	 * Disabling the same while the problem is being debugged and analyzed.
> > +	 */
> > +	if (IS_TIGERLAKE(dev_priv))
> > +		return 0;
> > +
> >  	if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9)
> >  		return 1;
> >
> > --
> > 2.22.0
> 
> --
> Ville Syrjälä
> Intel
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  reply	other threads:[~2020-07-28  8:21 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-16 14:58 [Intel-gfx] [v2] drm/i915/display/fbc: Disable fbc by default on TGL Uma Shankar
2020-07-16 14:44 ` Ville Syrjälä
2020-07-28  8:21   ` Shankar, Uma [this message]
2020-07-16 15:43 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display/fbc: Disable fbc by default on TGL (rev2) Patchwork
2020-07-16 15:51   ` Shankar, Uma
2020-07-16 17:24     ` Vudum, Lakshminarayana
2020-07-16 17:18 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-16 19:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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