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From: David Hawkins <dwh@ovro.caltech.edu>
To: Matt Porter <mporter@kernel.crashing.org>
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Maximum ioremap size for ppc arch?
Date: Mon, 03 Dec 2007 11:51:35 -0800	[thread overview]
Message-ID: <47545E47.8010408@ovro.caltech.edu> (raw)
In-Reply-To: <20071203190723.GB30746@gate.crashing.org>

Hi Matt,

> Yes, same thing. There's N ways to fix it. But I see you're talking
> x86.
> 
>> PS. The CPUs in this case are x86 based, while the PCI boards use
>> PLX-9054 bridges. I'm building new peripheral boards with MPC8349EAs
>> so this problem is going to rear its ugly head again soon, when
>> I work on the drivers for the new peripheral boards.
> 
> You should be able to do something similar on x86 but the details
> are TBD. I would probably try to limit low memory to 512MB in the
> x86 case.

Yeah, that works for me. The CPUs were ordered with 512MB,
but arrived with 1GB. It was thought a windfall at the time ...
but not-so after the driver weirdness :)

Thanks for the info. Now at least if I want to understand the
problem, I know where to look.

Cheers,
Dave

  reply	other threads:[~2007-12-03 19:50 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-12-03  9:22 Maximum ioremap size for ppc arch? michael.firth
2007-12-03 10:20 ` Arnd Bergmann
2007-12-03 15:30 ` Matt Porter
2007-12-03 17:50   ` David Hawkins
2007-12-03 19:07     ` Matt Porter
2007-12-03 19:51       ` David Hawkins [this message]
2007-12-05  9:50   ` michael.firth
2007-12-05 17:46     ` Scott Wood
2007-12-05 17:50       ` Scott Wood

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