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From: Alexander Stein <alexander.stein@ew.tq-group.com>
To: Marek Vasut <marex@denx.de>, Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH 1/4] clk: rs9: Check for vendor/device ID
Date: Wed, 04 Jan 2023 11:26:59 +0100	[thread overview]
Message-ID: <47810610.MN2xkq1pzW@steina-w> (raw)
In-Reply-To: <CAMuHMdWmypkjeowpsQ0-7z7Kfa5NjPeGYr0vujrfdVia5qjevw@mail.gmail.com>

Hi Geert,

Am Dienstag, 3. Januar 2023, 17:08:36 CET schrieb Geert Uytterhoeven:
> Hi Marek,
> 
> On Tue, Jan 3, 2023 at 4:45 PM Marek Vasut <marex@denx.de> wrote:
> > On 1/3/23 13:31, Alexander Stein wrote:
> > > This is in preparation to support additional devices which have
> > > different
> > > IDs as well as a slightly different register layout.
> > > 
> > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> > > ---
> > > 
> > >   drivers/clk/clk-renesas-pcie.c | 24 ++++++++++++++++++++++++
> > >   1 file changed, 24 insertions(+)
> > > 
> > > diff --git a/drivers/clk/clk-renesas-pcie.c
> > > b/drivers/clk/clk-renesas-pcie.c index e6247141d0c0..0076ed8f11b0
> > > 100644
> > > --- a/drivers/clk/clk-renesas-pcie.c
> > > +++ b/drivers/clk/clk-renesas-pcie.c
> > > @@ -45,6 +45,13 @@
> > > 
> > >   #define RS9_REG_DID                         0x6
> > >   #define RS9_REG_BCP                         0x7
> > > 
> > > +#define RS9_REG_VID_IDT                              0x01
> > > +
> > > +#define RS9_REG_DID_TYPE_FGV                 (0x0 <<
> > > RS9_REG_DID_TYPE_SHIFT) +#define RS9_REG_DID_TYPE_DBV                
> > > (0x1 << RS9_REG_DID_TYPE_SHIFT) +#define RS9_REG_DID_TYPE_DMV          
> > >       (0x2 << RS9_REG_DID_TYPE_SHIFT)> 
> > I'm not entirely sure whether this shouldn't be using the BIT() macro,
> > what do you think ?
> 
> They're not one-bit values (which bit does RS9_REG_DID_TYPE_FGV set? ;-),
> but values in a bitfield.
> 
> So using FIELD_PREP() and friends would make more sense to me.

FIELD_PREP() seems pretty nice, but unless I miss something it can't be used 
for initializing struct members. See renesas_9fgv0241_info.

Best regards,
Alexander

> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like
> that. -- Linus Torvalds





  reply	other threads:[~2023-01-04 10:27 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-03 12:31 [PATCH 1/4] clk: rs9: Check for vendor/device ID Alexander Stein
2023-01-03 12:31 ` [PATCH 2/4] dt-bindings: clk: rs9: Add bindings for 9FGV0441 Alexander Stein
2023-01-03 13:25   ` Krzysztof Kozlowski
2023-01-03 13:49     ` Alexander Stein
2023-01-03 12:31 ` [PATCH 3/4] clk: rs9: Support device specific dif bit calculation Alexander Stein
2023-01-03 14:31   ` Marek Vasut
2023-01-04 10:32     ` Alexander Stein
2023-01-04 14:34       ` Marek Vasut
2023-01-03 12:31 ` [PATCH 4/4] clk: rs9: Add support for 9FGV0441 Alexander Stein
2023-01-03 14:28 ` [PATCH 1/4] clk: rs9: Check for vendor/device ID Marek Vasut
2023-01-03 16:08   ` Geert Uytterhoeven
2023-01-04 10:26     ` Alexander Stein [this message]
2023-01-04 10:27   ` Alexander Stein
2023-01-04 14:36     ` Marek Vasut

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