From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 34B50FCA191 for ; Mon, 9 Mar 2026 21:25:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:Cc:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=oVHmmg5PbGhBJcH1DiEgCgltbKf4t8SXuZF/r8goSLw=; b=UGpKdJfbVKF9+8d8uG84qNwgWm iAPR5huk0GJq4tSgAUrtcsQjQ+/yP5VuPC1SPDXj+QMWhB5UDAs6kmYR1OsTJSdubzjiKeESGMq8y +/5GAlvMpJQBc8TGlpJW9GnaWJKy92aWEE1qgOuYh6U8/7y69+gKsrRSrNAa2gIqNwzCxYXKZCWRq +SyqTb3i99zDDUxWv5HJJbCuIy/CJawVVNYfcExagLr0c9Bs/0kTIYuyfFAr6CcYo1/gkgBm5dNVc 8zJ1zFenWewgKTm9ESB6sjWXBw+mCZaKqXj5vXRz1J3pfd5FlI8hcgd54000NGw9RRJeN8g/zk/R8 DApqo+Ug==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vzi68-00000008BIg-0hgG; Mon, 09 Mar 2026 21:25:08 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vzi65-00000008BHz-17FM; Mon, 09 Mar 2026 21:25:06 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Type:Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To; bh=oVHmmg5PbGhBJcH1DiEgCgltbKf4t8SXuZF/r8goSLw=; b=m65ga86fwWwLPFyKsNOsIcX0n5 t+hFSKHitbRnnM6HTltcGkOw/tM+icOJ6Po2iUWNNoMiJy7a7u9GvU+ZLT4CbtQ+QmzRISrhVkYzh cQUak1ZcIUurAZjCLi4UO0smzo1imi2Ysvh7okKiSYqWTtGPpv+8yHWpsPWHuuieDuCO75OyKuHvz DjrRpGK2Pp1QNKhrQVJeKkstBhNDvU/Rw0wPiS/sDuXiraKj1nOI0eE+ovUGNXPsnWjN7qtXi8EdK /oH4O1VDXio5inTRlf0oHSGLGY+jUWpVOtYVGr0BGnBIW1yQQKz1UMNJeiXOCIUocG6Kmbv/tNul7 KHMXW2IQ==; From: Heiko Stuebner To: Fabio Estevam Cc: jonas@kwiboo.se, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Fabio Estevam Subject: Re: [PATCH v5 2/4] ARM: dts: rockchip: Add support for RV1103B Date: Mon, 09 Mar 2026 22:24:52 +0100 Message-ID: <47923648.fMDQidcC6G@phil> In-Reply-To: <20260216010219.2131484-2-festevam@gmail.com> References: <20260216010219.2131484-1-festevam@gmail.com> <20260216010219.2131484-2-festevam@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260309_142505_328740_D8A2C826 X-CRM114-Status: GOOD ( 20.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Am Montag, 16. Februar 2026, 02:02:17 Mitteleurop=C3=A4ische Normalzeit sch= rieb Fabio Estevam: > From: Fabio Estevam >=20 > Add the initial RV1103B devicetree. >=20 > Based on the 5.10 Rockchip vendor kernel. >=20 > Signed-off-by: Fabio Estevam > --- > The header comes from another > series: >=20 > https://lore.kernel.org/linux-devicetree/20260210022620.172570-1-festevam= @gmail.com/ >=20 > Maybe Heiko could apply the clock series as well? >=20 > Changes since v4: > - None. >=20 > .../boot/dts/rockchip/rv1103b-pinctrl.dtsi | 816 ++++++++++++++++++ > arch/arm/boot/dts/rockchip/rv1103b.dtsi | 257 ++++++ > 2 files changed, 1073 insertions(+) > create mode 100644 arch/arm/boot/dts/rockchip/rv1103b-pinctrl.dtsi > create mode 100644 arch/arm/boot/dts/rockchip/rv1103b.dtsi > diff --git a/arch/arm/boot/dts/rockchip/rv1103b.dtsi b/arch/arm/boot/dts/= rockchip/rv1103b.dtsi > new file mode 100644 > index 000000000000..5955b249d4ce > --- /dev/null > +++ b/arch/arm/boot/dts/rockchip/rv1103b.dtsi > @@ -0,0 +1,257 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2024 Rockchip Electronics Co., Ltd. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +/ { > + #address-cells =3D <1>; > + #size-cells =3D <1>; > + > + compatible =3D "rockchip,rv1103b"; > + > + interrupt-parent =3D <&gic>; > + > + arm-pmu { > + compatible =3D "arm,cortex-a7-pmu"; > + interrupts =3D ; > + interrupt-affinity =3D <&cpu0>; > + }; > + > + xin32k: oscillator-32k { > + compatible =3D "fixed-clock"; > + clock-frequency =3D <32768>; > + clock-output-names =3D "xin32k"; > + #clock-cells =3D <0>; > + }; Please double-check where that xin32k is coming from in device-schematics. Yes the xin24m is normally a dedicated oscillator, but the xin32k in most cases is generated from the system-pmic. So please check and most likely move that to the board dts. Also, please sort node-names alphabetically (if there is no address) > + xin24m: oscillator-24m { > + compatible =3D "fixed-clock"; > + clock-frequency =3D <24000000>; > + clock-output-names =3D "xin24m"; > + #clock-cells =3D <0>; > + }; > + > + cpus { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + > + cpu0: cpu@0 { > + device_type =3D "cpu"; > + compatible =3D "arm,cortex-a7"; > + reg =3D <0x0>; > + clocks =3D <&cru ARMCLK>; > + }; > + }; > + > + timer { > + compatible =3D "arm,armv7-timer"; > + interrupts =3D , > + ; > + clock-frequency =3D <24000000>; > + }; > + > + pinctrl: pinctrl { > + compatible =3D "rockchip,rv1103b-pinctrl"; > + rockchip,grf =3D <&ioc>; > + #address-cells =3D <1>; > + #size-cells =3D <1>; > + ranges; > + > + gpio0: gpio@20520000 { > + compatible =3D "rockchip,gpio-bank"; > + reg =3D <0x20520000 0x200>; > + interrupts =3D ; > + clocks =3D <&cru PCLK_PMU_GPIO0>, <&cru DBCLK_PMU_GPIO0>; > + gpio-controller; > + #gpio-cells =3D <2>; > + interrupt-controller; > + #interrupt-cells =3D <2>; > + }; > + > + gpio1: gpio@20d80000 { > + compatible =3D "rockchip,gpio-bank"; > + reg =3D <0x20d80000 0x200>; > + interrupts =3D ; > + clocks =3D <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; > + gpio-controller; > + #gpio-cells =3D <2>; > + interrupt-controller; > + #interrupt-cells =3D <2>; > + }; > + > + gpio2: gpio@20840000 { > + compatible =3D "rockchip,gpio-bank"; > + reg =3D <0x20840000 0x200>; > + interrupts =3D ; > + clocks =3D <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; > + gpio-controller; > + #gpio-cells =3D <2>; > + interrupt-controller; > + #interrupt-cells =3D <2>; > + }; > + }; > + > + soc { > + compatible =3D "simple-bus"; > + #address-cells =3D <1>; > + #size-cells =3D <1>; > + ranges; > + > + cru: clock-controller@20000000 { > + compatible =3D "rockchip,rv1103b-cru"; > + reg =3D <0x20000000 0x81000>; > + #clock-cells =3D <1>; > + #reset-cells =3D <1>; > + bootph-all; I don't think we want u-boot-specific properties in mainline. They are normally kept in separate -u-boot.dtsi files > + }; [...] > + uart1: serial@20870000 { > + compatible =3D "rockchip,rv1103b-uart", "snps,dw-apb-uart"; uart compatible, does not seem to have landed in the uart tree > + reg =3D <0x20870000 0x100>; > + interrupts =3D ; > + reg-shift =3D <2>; > + reg-io-width =3D <4>; > + clocks =3D <&cru SCLK_UART1>, <&cru PCLK_UART1>; > + clock-names =3D "baudclk", "apb_pclk"; > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&uart1m0_xfer>; > + status =3D "disabled"; > + }; [...] > + wdt: watchdog@208d0000 { > + compatible =3D "snps,dw-wdt"; please add a new compatible to the dw-wdt watchdog binding > + reg =3D <0x208d0000 0x100>; > + clocks =3D <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>; > + clock-names =3D "tclk", "pclk"; > + interrupts =3D ; > + status =3D "disabled"; > + }; > + Heiko From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10BFBFCA191 for ; Mon, 9 Mar 2026 21:25:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Eieu0l71M5m6OhPm2EO3Jf90WGXrSN0w6blCJGjYR5Y=; b=iHO12P0wi2D1+h fAHfY9Ux1y3sbJU0uBbOMb3alKTUCcn1dTNzt3PO9c3/tS1zJYYc7NWqMy/fwZAO5T72BI8byuvKG zpbIuGQLpfKRPxy7hqbXVoLlhdorBIctqjqzM6hN7Sz+tNElJGGH/5xF8XRuPBU0ueH23CvM1ZVcp T2pYLmI0MWcvNA7SffRpLRKjaQRNVG3+YJ/i0S9pmIfDsrw18Iqp6CFq2FmzPcz/w4DX2YoK57ouP +vkhNpQSE+HghHcocZBB6AIlzVq4K8+nJvUTGIByzG7qyHENcUuWvHVT6te3d0j7QKMc3oPXfRJGq mQfV11P6tTadIHnOnXAA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vzi68-00000008BIx-1vEl; Mon, 09 Mar 2026 21:25:08 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vzi65-00000008BHz-17FM; Mon, 09 Mar 2026 21:25:06 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Type:Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To; bh=oVHmmg5PbGhBJcH1DiEgCgltbKf4t8SXuZF/r8goSLw=; b=m65ga86fwWwLPFyKsNOsIcX0n5 t+hFSKHitbRnnM6HTltcGkOw/tM+icOJ6Po2iUWNNoMiJy7a7u9GvU+ZLT4CbtQ+QmzRISrhVkYzh cQUak1ZcIUurAZjCLi4UO0smzo1imi2Ysvh7okKiSYqWTtGPpv+8yHWpsPWHuuieDuCO75OyKuHvz DjrRpGK2Pp1QNKhrQVJeKkstBhNDvU/Rw0wPiS/sDuXiraKj1nOI0eE+ovUGNXPsnWjN7qtXi8EdK /oH4O1VDXio5inTRlf0oHSGLGY+jUWpVOtYVGr0BGnBIW1yQQKz1UMNJeiXOCIUocG6Kmbv/tNul7 KHMXW2IQ==; From: Heiko Stuebner To: Fabio Estevam Cc: jonas@kwiboo.se, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Fabio Estevam Subject: Re: [PATCH v5 2/4] ARM: dts: rockchip: Add support for RV1103B Date: Mon, 09 Mar 2026 22:24:52 +0100 Message-ID: <47923648.fMDQidcC6G@phil> In-Reply-To: <20260216010219.2131484-2-festevam@gmail.com> References: <20260216010219.2131484-1-festevam@gmail.com> <20260216010219.2131484-2-festevam@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260309_142505_328740_D8A2C826 X-CRM114-Status: GOOD ( 20.10 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org QW0gTW9udGFnLCAxNi4gRmVicnVhciAyMDI2LCAwMjowMjoxNyBNaXR0ZWxldXJvcMOkaXNjaGUg Tm9ybWFsemVpdCBzY2hyaWViIEZhYmlvIEVzdGV2YW06Cj4gRnJvbTogRmFiaW8gRXN0ZXZhbSA8 ZmVzdGV2YW1AbmFibGFkZXYuY29tPgo+IAo+IEFkZCB0aGUgaW5pdGlhbCBSVjExMDNCIGRldmlj ZXRyZWUuCj4gCj4gQmFzZWQgb24gdGhlIDUuMTAgUm9ja2NoaXAgdmVuZG9yIGtlcm5lbC4KPiAK PiBTaWduZWQtb2ZmLWJ5OiBGYWJpbyBFc3RldmFtIDxmZXN0ZXZhbUBuYWJsYWRldi5jb20+Cj4g LS0tCj4gVGhlIDxkdC1iaW5kaW5ncy9jbG9jay9yb2NrY2hpcCxydjExMDNiLWNydS5oPiBoZWFk ZXIgY29tZXMgZnJvbSBhbm90aGVyCj4gc2VyaWVzOgo+IAo+IGh0dHBzOi8vbG9yZS5rZXJuZWwu b3JnL2xpbnV4LWRldmljZXRyZWUvMjAyNjAyMTAwMjI2MjAuMTcyNTcwLTEtZmVzdGV2YW1AZ21h aWwuY29tLwo+IAo+IE1heWJlIEhlaWtvIGNvdWxkIGFwcGx5IHRoZSBjbG9jayBzZXJpZXMgYXMg d2VsbD8KPiAKPiBDaGFuZ2VzIHNpbmNlIHY0Ogo+IC0gTm9uZS4KPiAKPiAgLi4uL2Jvb3QvZHRz L3JvY2tjaGlwL3J2MTEwM2ItcGluY3RybC5kdHNpICAgIHwgODE2ICsrKysrKysrKysrKysrKysr Kwo+ICBhcmNoL2FybS9ib290L2R0cy9yb2NrY2hpcC9ydjExMDNiLmR0c2kgICAgICAgfCAyNTcg KysrKysrCj4gIDIgZmlsZXMgY2hhbmdlZCwgMTA3MyBpbnNlcnRpb25zKCspCj4gIGNyZWF0ZSBt b2RlIDEwMDY0NCBhcmNoL2FybS9ib290L2R0cy9yb2NrY2hpcC9ydjExMDNiLXBpbmN0cmwuZHRz aQo+ICBjcmVhdGUgbW9kZSAxMDA2NDQgYXJjaC9hcm0vYm9vdC9kdHMvcm9ja2NoaXAvcnYxMTAz Yi5kdHNpCgoKPiBkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vYm9vdC9kdHMvcm9ja2NoaXAvcnYxMTAz Yi5kdHNpIGIvYXJjaC9hcm0vYm9vdC9kdHMvcm9ja2NoaXAvcnYxMTAzYi5kdHNpCj4gbmV3IGZp bGUgbW9kZSAxMDA2NDQKPiBpbmRleCAwMDAwMDAwMDAwMDAuLjU5NTViMjQ5ZDRjZQo+IC0tLSAv ZGV2L251bGwKPiArKysgYi9hcmNoL2FybS9ib290L2R0cy9yb2NrY2hpcC9ydjExMDNiLmR0c2kK PiBAQCAtMCwwICsxLDI1NyBAQAo+ICsvLyBTUERYLUxpY2Vuc2UtSWRlbnRpZmllcjogKEdQTC0y LjArIE9SIE1JVCkKPiArLyoKPiArICogQ29weXJpZ2h0IChjKSAyMDI0IFJvY2tjaGlwIEVsZWN0 cm9uaWNzIENvLiwgTHRkLgo+ICsgKi8KPiArCj4gKyNpbmNsdWRlIDxkdC1iaW5kaW5ncy9jbG9j ay9yb2NrY2hpcCxydjExMDNiLWNydS5oPgo+ICsjaW5jbHVkZSA8ZHQtYmluZGluZ3MvZ3Bpby9n cGlvLmg+Cj4gKyNpbmNsdWRlIDxkdC1iaW5kaW5ncy9pbnRlcnJ1cHQtY29udHJvbGxlci9pcnEu aD4KPiArI2luY2x1ZGUgPGR0LWJpbmRpbmdzL2ludGVycnVwdC1jb250cm9sbGVyL2FybS1naWMu aD4KPiArI2luY2x1ZGUgPGR0LWJpbmRpbmdzL3BpbmN0cmwvcm9ja2NoaXAuaD4KPiArI2luY2x1 ZGUgPGR0LWJpbmRpbmdzL3NvYy9yb2NrY2hpcCxib290LW1vZGUuaD4KPiArCj4gKy8gewo+ICsJ I2FkZHJlc3MtY2VsbHMgPSA8MT47Cj4gKwkjc2l6ZS1jZWxscyA9IDwxPjsKPiArCj4gKwljb21w YXRpYmxlID0gInJvY2tjaGlwLHJ2MTEwM2IiOwo+ICsKPiArCWludGVycnVwdC1wYXJlbnQgPSA8 JmdpYz47Cj4gKwo+ICsJYXJtLXBtdSB7Cj4gKwkJY29tcGF0aWJsZSA9ICJhcm0sY29ydGV4LWE3 LXBtdSI7Cj4gKwkJaW50ZXJydXB0cyA9IDxHSUNfU1BJIDEyNyBJUlFfVFlQRV9MRVZFTF9ISUdI PjsKPiArCQlpbnRlcnJ1cHQtYWZmaW5pdHkgPSA8JmNwdTA+Owo+ICsJfTsKPiArCj4gKwl4aW4z Mms6IG9zY2lsbGF0b3ItMzJrIHsKPiArCQljb21wYXRpYmxlID0gImZpeGVkLWNsb2NrIjsKPiAr CQljbG9jay1mcmVxdWVuY3kgPSA8MzI3Njg+Owo+ICsJCWNsb2NrLW91dHB1dC1uYW1lcyA9ICJ4 aW4zMmsiOwo+ICsJCSNjbG9jay1jZWxscyA9IDwwPjsKPiArCX07CgpQbGVhc2UgZG91YmxlLWNo ZWNrIHdoZXJlIHRoYXQgeGluMzJrIGlzIGNvbWluZyBmcm9tIGluIGRldmljZS1zY2hlbWF0aWNz LgpZZXMgdGhlIHhpbjI0bSBpcyBub3JtYWxseSBhIGRlZGljYXRlZCBvc2NpbGxhdG9yLCBidXQg dGhlIHhpbjMyayBpbgptb3N0IGNhc2VzIGlzIGdlbmVyYXRlZCBmcm9tIHRoZSBzeXN0ZW0tcG1p Yy4KClNvIHBsZWFzZSBjaGVjayBhbmQgbW9zdCBsaWtlbHkgbW92ZSB0aGF0IHRvIHRoZSBib2Fy ZCBkdHMuCgpBbHNvLCBwbGVhc2Ugc29ydCBub2RlLW5hbWVzIGFscGhhYmV0aWNhbGx5IChpZiB0 aGVyZSBpcyBubyBhZGRyZXNzKQoKCj4gKwl4aW4yNG06IG9zY2lsbGF0b3ItMjRtIHsKPiArCQlj b21wYXRpYmxlID0gImZpeGVkLWNsb2NrIjsKPiArCQljbG9jay1mcmVxdWVuY3kgPSA8MjQwMDAw MDA+Owo+ICsJCWNsb2NrLW91dHB1dC1uYW1lcyA9ICJ4aW4yNG0iOwo+ICsJCSNjbG9jay1jZWxs cyA9IDwwPjsKPiArCX07Cj4gKwo+ICsJY3B1cyB7Cj4gKwkJI2FkZHJlc3MtY2VsbHMgPSA8MT47 Cj4gKwkJI3NpemUtY2VsbHMgPSA8MD47Cj4gKwo+ICsJCWNwdTA6IGNwdUAwIHsKPiArCQkJZGV2 aWNlX3R5cGUgPSAiY3B1IjsKPiArCQkJY29tcGF0aWJsZSA9ICJhcm0sY29ydGV4LWE3IjsKPiAr CQkJcmVnID0gPDB4MD47Cj4gKwkJCWNsb2NrcyA9IDwmY3J1IEFSTUNMSz47Cj4gKwkJfTsKPiAr CX07Cj4gKwo+ICsJdGltZXIgewo+ICsJCWNvbXBhdGlibGUgPSAiYXJtLGFybXY3LXRpbWVyIjsK PiArCQlpbnRlcnJ1cHRzID0gPEdJQ19QUEkgMTMgKEdJQ19DUFVfTUFTS19TSU1QTEUoMSkgfCBJ UlFfVFlQRV9MRVZFTF9ISUdIKT4sCj4gKwkJCSAgICAgPEdJQ19QUEkgMTQgKEdJQ19DUFVfTUFT S19TSU1QTEUoMSkgfCBJUlFfVFlQRV9MRVZFTF9ISUdIKT47Cj4gKwkJY2xvY2stZnJlcXVlbmN5 ID0gPDI0MDAwMDAwPjsKPiArCX07Cj4gKwo+ICsJcGluY3RybDogcGluY3RybCB7Cj4gKwkJY29t cGF0aWJsZSA9ICJyb2NrY2hpcCxydjExMDNiLXBpbmN0cmwiOwo+ICsJCXJvY2tjaGlwLGdyZiA9 IDwmaW9jPjsKPiArCQkjYWRkcmVzcy1jZWxscyA9IDwxPjsKPiArCQkjc2l6ZS1jZWxscyA9IDwx PjsKPiArCQlyYW5nZXM7Cj4gKwo+ICsJCWdwaW8wOiBncGlvQDIwNTIwMDAwIHsKPiArCQkJY29t cGF0aWJsZSA9ICJyb2NrY2hpcCxncGlvLWJhbmsiOwo+ICsJCQlyZWcgPSA8MHgyMDUyMDAwMCAw eDIwMD47Cj4gKwkJCWludGVycnVwdHMgPSA8R0lDX1NQSSA3NSBJUlFfVFlQRV9MRVZFTF9ISUdI PjsKPiArCQkJY2xvY2tzID0gPCZjcnUgUENMS19QTVVfR1BJTzA+LCA8JmNydSBEQkNMS19QTVVf R1BJTzA+Owo+ICsJCQlncGlvLWNvbnRyb2xsZXI7Cj4gKwkJCSNncGlvLWNlbGxzID0gPDI+Owo+ ICsJCQlpbnRlcnJ1cHQtY29udHJvbGxlcjsKPiArCQkJI2ludGVycnVwdC1jZWxscyA9IDwyPjsK PiArCQl9Owo+ICsKPiArCQlncGlvMTogZ3Bpb0AyMGQ4MDAwMCB7Cj4gKwkJCWNvbXBhdGlibGUg PSAicm9ja2NoaXAsZ3Bpby1iYW5rIjsKPiArCQkJcmVnID0gPDB4MjBkODAwMDAgMHgyMDA+Owo+ ICsJCQlpbnRlcnJ1cHRzID0gPEdJQ19TUEkgNzkgSVJRX1RZUEVfTEVWRUxfSElHSD47Cj4gKwkJ CWNsb2NrcyA9IDwmY3J1IFBDTEtfR1BJTzE+LCA8JmNydSBEQkNMS19HUElPMT47Cj4gKwkJCWdw aW8tY29udHJvbGxlcjsKPiArCQkJI2dwaW8tY2VsbHMgPSA8Mj47Cj4gKwkJCWludGVycnVwdC1j b250cm9sbGVyOwo+ICsJCQkjaW50ZXJydXB0LWNlbGxzID0gPDI+Owo+ICsJCX07Cj4gKwo+ICsJ CWdwaW8yOiBncGlvQDIwODQwMDAwIHsKPiArCQkJY29tcGF0aWJsZSA9ICJyb2NrY2hpcCxncGlv LWJhbmsiOwo+ICsJCQlyZWcgPSA8MHgyMDg0MDAwMCAweDIwMD47Cj4gKwkJCWludGVycnVwdHMg PSA8R0lDX1NQSSA4MyBJUlFfVFlQRV9MRVZFTF9ISUdIPjsKPiArCQkJY2xvY2tzID0gPCZjcnUg UENMS19HUElPMj4sIDwmY3J1IERCQ0xLX0dQSU8yPjsKPiArCQkJZ3Bpby1jb250cm9sbGVyOwo+ ICsJCQkjZ3Bpby1jZWxscyA9IDwyPjsKPiArCQkJaW50ZXJydXB0LWNvbnRyb2xsZXI7Cj4gKwkJ CSNpbnRlcnJ1cHQtY2VsbHMgPSA8Mj47Cj4gKwkJfTsKPiArCX07Cj4gKwo+ICsJc29jIHsKPiAr CQljb21wYXRpYmxlID0gInNpbXBsZS1idXMiOwo+ICsJCSNhZGRyZXNzLWNlbGxzID0gPDE+Owo+ ICsJCSNzaXplLWNlbGxzID0gPDE+Owo+ICsJCXJhbmdlczsKPiArCj4gKwkJY3J1OiBjbG9jay1j b250cm9sbGVyQDIwMDAwMDAwIHsKPiArCQkJY29tcGF0aWJsZSA9ICJyb2NrY2hpcCxydjExMDNi LWNydSI7Cj4gKwkJCXJlZyA9IDwweDIwMDAwMDAwIDB4ODEwMDA+Owo+ICsJCQkjY2xvY2stY2Vs bHMgPSA8MT47Cj4gKwkJCSNyZXNldC1jZWxscyA9IDwxPjsKPiArCQkJYm9vdHBoLWFsbDsKCkkg ZG9uJ3QgdGhpbmsgd2Ugd2FudCB1LWJvb3Qtc3BlY2lmaWMgcHJvcGVydGllcyBpbiBtYWlubGlu ZS4KVGhleSBhcmUgbm9ybWFsbHkga2VwdCBpbiBzZXBhcmF0ZSAtdS1ib290LmR0c2kgZmlsZXMK Cj4gKwkJfTsKClsuLi5dCgo+ICsJCXVhcnQxOiBzZXJpYWxAMjA4NzAwMDAgewo+ICsJCQljb21w YXRpYmxlID0gInJvY2tjaGlwLHJ2MTEwM2ItdWFydCIsICJzbnBzLGR3LWFwYi11YXJ0IjsKCnVh cnQgY29tcGF0aWJsZSwgZG9lcyBub3Qgc2VlbSB0byBoYXZlIGxhbmRlZCBpbiB0aGUgdWFydCB0 cmVlCgo+ICsJCQlyZWcgPSA8MHgyMDg3MDAwMCAweDEwMD47Cj4gKwkJCWludGVycnVwdHMgPSA8 R0lDX1NQSSA3MCBJUlFfVFlQRV9MRVZFTF9ISUdIPjsKPiArCQkJcmVnLXNoaWZ0ID0gPDI+Owo+ ICsJCQlyZWctaW8td2lkdGggPSA8ND47Cj4gKwkJCWNsb2NrcyA9IDwmY3J1IFNDTEtfVUFSVDE+ LCA8JmNydSBQQ0xLX1VBUlQxPjsKPiArCQkJY2xvY2stbmFtZXMgPSAiYmF1ZGNsayIsICJhcGJf cGNsayI7Cj4gKwkJCXBpbmN0cmwtbmFtZXMgPSAiZGVmYXVsdCI7Cj4gKwkJCXBpbmN0cmwtMCA9 IDwmdWFydDFtMF94ZmVyPjsKPiArCQkJc3RhdHVzID0gImRpc2FibGVkIjsKPiArCQl9OwoKWy4u Ll0KCj4gKwkJd2R0OiB3YXRjaGRvZ0AyMDhkMDAwMCB7Cj4gKwkJCWNvbXBhdGlibGUgPSAic25w cyxkdy13ZHQiOwoKcGxlYXNlIGFkZCBhIG5ldyBjb21wYXRpYmxlIHRvIHRoZSBkdy13ZHQgd2F0 Y2hkb2cgYmluZGluZwoKPiArCQkJcmVnID0gPDB4MjA4ZDAwMDAgMHgxMDA+Owo+ICsJCQljbG9j a3MgPSA8JmNydSBUQ0xLX1dEVF9OUz4sIDwmY3J1IFBDTEtfV0RUX05TPjsKPiArCQkJY2xvY2st bmFtZXMgPSAidGNsayIsICJwY2xrIjsKPiArCQkJaW50ZXJydXB0cyA9IDxHSUNfU1BJIDI5IElS UV9UWVBFX0xFVkVMX0hJR0g+Owo+ICsJCQlzdGF0dXMgPSAiZGlzYWJsZWQiOwo+ICsJCX07Cj4g KwoKCkhlaWtvCgoKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fCkxpbnV4LXJvY2tjaGlwIG1haWxpbmcgbGlzdApMaW51eC1yb2NrY2hpcEBsaXN0cy5pbmZy YWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGlu dXgtcm9ja2NoaXAK