From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christian Ehrhardt Date: Thu, 31 Jan 2008 08:32:52 +0000 Subject: Re: [kvm-ppc-devel] [PATCH] [3/4] Add userpace tlb access Message-Id: <47A187B4.3080308@linux.vnet.ibm.com> List-Id: References: <12016963202210-git-send-email-ehrhardt@linux.vnet.ibm.com> In-Reply-To: <12016963202210-git-send-email-ehrhardt@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable To: kvm-ppc@vger.kernel.org Hollis Blanchard wrote: > On Wed, 2008-01-30 at 13:31 +0100, ehrhardt@linux.vnet.ibm.com wrote: >> This version of the userspace tlb access has some changes out of discuss= ions >> with Zhang Wei responsible for the e500 work and Hollis for ppc440. It n= ow >> transports only a single tlb entry per get/set and uses an index specifi= er >> that every architecture can interpret as needed e.g. e500 could map tlb0= /tlb1 >> in the high bits and the array index in them in the low bits while ppc44= 0 only >> needs a linear index. The right vcpu is already selected since this is a= vcpu >> ioctl. >> Internally the selction of the right tlb layout in kernel e.g. for set/g= et_tlb >> or in userspace for kvm_dump_tlb is now based on the pvr that selects the >> defines the guest type. >> >> Subject: [PATCH] [3/4] Add userpace tlb access >> From: Christian Ehrhardt >> >> This adds userspace tlb access transporting a single tlb entry to/from >> userspace. It has an index variable passed with the call to specify the = tlb >> entry to get/set. For the guest tlb get&set is supported while the shadow >> tlb can only be read from userspace. >=20 > Didn't we agree not to export the shadow TLB? The last agreement I found was to export shadow TLB read only which is what= I have here. But it's easy to remove if needed ;-) So do you think it is really completely useless e.g. on a tlb dump ? If yes= we can remove it, but if it can give us even a small benefit we should keep the read only access. =20 > ... >> diff --git a/include/asm-powerpc/kvm.h b/include/asm-powerpc/kvm.h >> --- a/include/asm-powerpc/kvm.h >> +++ b/include/asm-powerpc/kvm.h >> @@ -21,6 +21,7 @@ >> #define __POWERPC_KVM_H__ >> >> #include >> +#include >> >> struct kvm_regs { >> __u32 pc; >> @@ -53,6 +54,22 @@ struct kvm_fpu { >> struct kvm_fpu { >> }; >> >> +struct tlbe { >> + __u32 tid; /* Only the low 8 bits are used. */ >> + __u32 word0; >> + __u32 word1; >> + __u32 word2; >> +}; >=20 > This definitely must be renamed. I'll add a renaming patch on top when I resend the patches next time. >> +struct kvm_tlbe { >> + __u32 index; >> + union { >> + struct tlbe tlbe_ppc440; >> + /* Fix the size of the union (hopefully) */ >> + char padding[32]; >> + }; >> +}; >=20 > Are you sure 32 bytes will be large enough? I think Freescale uses a ton > of MAS registers for TLB insertion. Well I thought it should be enough but we can use 64bit just to be safer. --=20 Gr=FCsse / regards,=20 Christian Ehrhardt IBM Linux Technology Center, Open Virtualization ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ _______________________________________________ kvm-ppc-devel mailing list kvm-ppc-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-ppc-devel