Re: IBM test question

[Matthieu CASTET <matthieu.castet@parrot.com>]

Hi Sébastien,

Sébastien Dugué wrote:
>   Hello Matthieu,
> 
> On Thu, 07 Feb 2008 14:49:07 +0100 Matthieu CASTET <matthieu.castet@parrot.com> wrote:
> 
>> hi,
>>
>> I am trying to use some IBM rt test on arm.
>>
>>
>> I define atomic_add to
>> assert(i==1);
>> return ++(v->counter);
>>
>> That's a bit ugly, but that should work for my need.
> 
>   That would be the poor man's atomic_inc() and not sure it really does
> what you think it does ;). Just for the record, pre-armv6 cores have no support
> for userland atomic operations (aside from swapping).
I can, if I use a kernel helper :) [1]

BTW what should do the atomic_add.
On i386 it does the atomic add and return the value in memory before the 
add (Exchange and Add).
On powerpc, it seems to do the atomic add and return the new value.


> 
>> But I have a problem with the sched_latency test.
>> On my platform the thread creation is quite slow (25ms), so with the 
>> default value, I got a PERIOD MISSED.
> 
>   The IBM RT tests have been integrated into the LTP and I recently
> sent some updates to those testcases. Notably one the patches did improve
> the thread starting time. Other patches did touch this particular test too.
> 
>   Could you try the latest release (from LTP) and tell me if things
> have improved for you.
Ok I will try them.
> 
>   Also, the PASS/FAIL criteria are quite arbitrary. They happen to be fine
> for most recent PC-class hardware but surely not for embedded systems and
> should be tuned according to your RT requirements.
Yes I saw that.


> 
>> Also my cpu is quite slow (compared to last intel core or powerpc). For 
>> example a sched_jitter run take 6s.
> 
>   Ouch! What's your CPU (core type, clock speed)?
Arm926 ~104.65 Mhz

Thanks,

Matthieu

[1]
#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
   ({ register __typeof (oldval) a_oldval asm ("r0"); 
        \
      register __typeof (oldval) a_newval asm ("r1") = (newval); 
        \
      register __typeof (mem) a_ptr asm ("r2") = (mem); 
        \
      register __typeof (oldval) a_tmp asm ("r3"); 
        \
      register __typeof (oldval) a_oldval2 asm ("r4") = (oldval); 
        \
      __asm__ __volatile__ 
        \
              ("0:\tldr\t%[tmp],[%[ptr]]\n\t" 
        \
               "cmp\t%[tmp], %[old2]\n\t" 
        \
               "bne\t1f\n\t" 
        \
               "mov\t%[old], %[old2]\n\t" 
        \
               "mov\t%[tmp], #0xffff0fff\n\t" 
        \
               "mov\tlr, pc\n\t" 
        \
               "add\tpc, %[tmp], #(0xffff0fc0 - 0xffff0fff)\n\t" 
        \
               "bcc\t0b\n\t" 
        \
               "mov\t%[tmp], %[old2]\n\t" 
        \
               "1:" 
        \
               : [old] "=&r" (a_oldval), [tmp] "=&r" (a_tmp) 
        \
               : [new] "r" (a_newval), [ptr] "r" (a_ptr), 
        \
                 [old2] "r" (a_oldval2) 
        \
               : "ip", "lr", "cc", "memory"); 
        \
      a_tmp; })
	do {
		int oldval = v->counter;
		int ret;
		ret = __arch_compare_and_exchange_val_32_acq(&v->counter, oldval+i, 
oldval);
	} while (ret != oldval);
	return oldval;