From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JVykH-0003Pk-L3 for qemu-devel@nongnu.org; Sun, 02 Mar 2008 19:41:33 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JVykG-0003N9-3L for qemu-devel@nongnu.org; Sun, 02 Mar 2008 19:41:33 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JVykF-0003Mm-Nw for qemu-devel@nongnu.org; Sun, 02 Mar 2008 19:41:31 -0500 Received: from pop-savannah.atl.sa.earthlink.net ([207.69.195.69]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1JVykF-0006Xv-ER for qemu-devel@nongnu.org; Sun, 02 Mar 2008 19:41:31 -0500 Received: from user-142h2k8.cable.mindspring.com ([72.40.138.136] helo=earthlink.net) by pop-savannah.atl.sa.earthlink.net with esmtp (Exim 3.36 #1) id 1JVykE-0006fr-00 for qemu-devel@nongnu.org; Sun, 02 Mar 2008 19:41:30 -0500 Message-ID: <47CB4935.60805@earthlink.net> Date: Sun, 02 Mar 2008 19:41:25 -0500 From: Robert Reif MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------030803030300010403060106" Subject: [Qemu-devel] [PATCH] hw/sun4m.c show IRQ set or reset Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This is a multi-part message in MIME format. --------------030803030300010403060106 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Show which CPU IRQ is actually being set or reset when debugging. --------------030803030300010403060106 Content-Type: text/plain; name="irq.diff.txt" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="irq.diff.txt" diff -p -u -r1.86 sun4m.c --- hw/sun4m.c 2 Mar 2008 08:48:47 -0000 1.86 +++ hw/sun4m.c 3 Mar 2008 00:35:29 -0000 @@ -258,12 +258,15 @@ void cpu_check_irqs(CPUState *env) int old_interrupt = env->interrupt_index; env->interrupt_index = TT_EXTINT | i; - if (old_interrupt != env->interrupt_index) + if (old_interrupt != env->interrupt_index) { + DPRINTF("Set CPU IRQ %d\n", i); cpu_interrupt(env, CPU_INTERRUPT_HARD); + } break; } } } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) { + DPRINTF("Reset CPU IRQ %d\n", env->interrupt_index & 15); env->interrupt_index = 0; cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); } --------------030803030300010403060106--