From: goda.yusuke <goda.yusuke@renesas.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] [PATCH] sh: Add support PCI of SuperH and SH7780
Date: Wed, 05 Mar 2008 17:05:28 +0900 [thread overview]
Message-ID: <47CE5448.4040408@renesas.com> (raw)
This patch add support PCI of SuperH base code and SH7780 specific code.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
---
cpu/sh4/Makefile | 3 +-
cpu/sh4/pci-sh4.c | 81 ++++++++++++++++++++++++++++++
cpu/sh4/pci-sh7780.c | 111 +++++++++++++++++++++++++++++++++++++++++
include/asm-sh/cpu_sh7780.h | 114 +++++++++++++++++++++---------------------
include/asm-sh/pci.h | 46 +++++++++++++++++
lib_sh/board.c | 13 +++++-
6 files changed, 309 insertions(+), 59 deletions(-)
create mode 100644 cpu/sh4/pci-sh4.c
create mode 100644 cpu/sh4/pci-sh7780.c
create mode 100644 include/asm-sh/pci.h
diff --git a/cpu/sh4/Makefile b/cpu/sh4/Makefile
index 1bb8bd7..7a53cb6 100644
--- a/cpu/sh4/Makefile
+++ b/cpu/sh4/Makefile
@@ -29,7 +29,8 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).a
START = start.o
-OBJS = cpu.o interrupts.o watchdog.o time.o cache.o
+OBJS = cpu.o interrupts.o watchdog.o time.o cache.o \
+ pci-sh4.o pci-sh7780.o
all: .depend $(START) $(LIB)
diff --git a/cpu/sh4/pci-sh4.c b/cpu/sh4/pci-sh4.c
new file mode 100644
index 0000000..9d14f8d
--- /dev/null
+++ b/cpu/sh4/pci-sh4.c
@@ -0,0 +1,81 @@
+/*
+ * SH4 PCI Controller (PCIC) for U-Boot.
+ * (C) Dustin McIntire (dustin at sensoria.com)
+ * (C) 2007 Nobuhiro Iwamatsu
+ * (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
+ *
+ * u-boot/cpu/sh4/pci-sh4.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if defined(CONFIG_PCI) && \
+ defined(CONFIG_SH4_PCI)
+
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/pci.h>
+#include <pci.h>
+
+int pci_sh4_init(struct pci_controller *hose)
+{
+ hose->first_busno = 0;
+ hose->region_count = 0;
+ hose->last_busno = 0xff;
+
+ /* PCI memory space */
+ pci_set_region(hose->regions + 0,
+ CONFIG_PCI_MEM_BUS,
+ CONFIG_PCI_MEM_PHYS,
+ CONFIG_PCI_MEM_SIZE,
+ PCI_REGION_MEM);
+ hose->region_count++;
+
+ /* PCI IO space */
+ pci_set_region(hose->regions + 1,
+ CONFIG_PCI_IO_BUS,
+ CONFIG_PCI_IO_PHYS,
+ CONFIG_PCI_IO_SIZE,
+ PCI_REGION_IO);
+ hose->region_count++;
+
+ udelay(1000);
+
+ pci_set_ops(hose,
+ pci_hose_read_config_byte_via_dword,
+ pci_hose_read_config_word_via_dword,
+ pci_sh4_read_config_dword,
+ pci_hose_write_config_byte_via_dword,
+ pci_hose_write_config_word_via_dword,
+ pci_sh4_write_config_dword);
+
+ pci_register_hose(hose);
+
+ udelay(1000);
+
+#ifdef CONFIG_PCI_SCAN_SHOW
+ printf("PCI: Bus Dev VenId DevId Class Int\n");
+#endif
+ hose->last_busno = pci_hose_scan(hose);
+ return 0;
+}
+
+#endif /* defined(CONFIG_PCI) && defined(CONFIG_SH4_PCI) */
diff --git a/cpu/sh4/pci-sh7780.c b/cpu/sh4/pci-sh7780.c
new file mode 100644
index 0000000..851d767
--- /dev/null
+++ b/cpu/sh4/pci-sh7780.c
@@ -0,0 +1,111 @@
+/*
+ * SH7780 PCI Controller (PCIC) for U-Boot.
+ * (C) Dustin McIntire (dustin at sensoria.com)
+ * (C) 2007 Nobuhiro Iwamatsu
+ * (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if defined(CONFIG_PCI) && defined(CONFIG_SH4_PCI) \
+ && defined(CONFIG_CPU_SH7780)
+
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <pci.h>
+
+#define SH7780_VENDOR_ID 0x1912
+#define SH7780_DEVICE_ID 0x0002
+#define SH7780_PCICR_PREFIX 0xA5000000
+#define SH7780_PCICR_PFCS 0x00000800
+#define SH7780_PCICR_FTO 0x00000400
+#define SH7780_PCICR_PFE 0x00000200
+#define SH7780_PCICR_TBS 0x00000100
+#define SH7780_PCICR_ARBM 0x00000040
+#define SH7780_PCICR_IOCS 0x00000004
+#define SH7780_PCICR_PRST 0x00000002
+#define SH7780_PCICR_CFIN 0x00000001
+
+#define p4_in(addr) *((vu_long *)addr)
+#define p4_out(data,addr) *(vu_long *)(addr) = (data)
+#define p4_inw(addr) *((vu_short *)addr)
+#define p4_outw(data,addr) *(vu_short *)(addr) = (data)
+
+int pci_sh4_read_config_dword(struct pci_controller *hose,
+ pci_dev_t dev, int offset, u32 *value)
+{
+ u32 par_data = 0x80000000 | dev;
+
+ p4_out(par_data | (offset & 0xfc), SH7780_PCIPAR);
+ *value = p4_in(SH7780_PCIPDR);
+
+ return 0;
+}
+
+int pci_sh4_write_config_dword(struct pci_controller *hose,
+ pci_dev_t dev, int offset, u32 value)
+{
+ u32 par_data = 0x80000000 | dev;
+
+ p4_out(par_data | (offset & 0xfc), SH7780_PCIPAR);
+ p4_out(value, SH7780_PCIPDR);
+ return 0;
+}
+
+int pci_sh7780_init(struct pci_controller *hose)
+{
+ p4_out(0x01, SH7780_PCIECR);
+
+ if (p4_inw(SH7780_PCIVID) != SH7780_VENDOR_ID
+ && p4_inw(SH7780_PCIDID) != SH7780_DEVICE_ID){
+ printf("PCI: Unknown PCI host bridge.\n");
+ return;
+ }
+ printf("PCI: SH7780 PCI host bridge found.\n");
+
+ /* Toggle PCI reset pin */
+ p4_out((SH7780_PCICR_PREFIX | SH7780_PCICR_PRST), SH7780_PCICR);
+ udelay(100000);
+ p4_out(SH7780_PCICR_PREFIX, SH7780_PCICR);
+ p4_outw(0x0047, SH7780_PCICMD);
+
+ p4_out(0x07F00001, SH7780_PCILSR0);
+ p4_out(0x08000000, SH7780_PCILAR0);
+ p4_out(0x00000000, SH7780_PCILSR1);
+ p4_out(0, SH7780_PCILAR1);
+ p4_out(0x08000000, SH7780_PCIMBAR0);
+ p4_out(0x00000000, SH7780_PCIMBAR1);
+
+ p4_out(0xFD000000, SH7780_PCIMBR0);
+ p4_out(0x00FC0000, SH7780_PCIMBMR0);
+
+ /* if use Operand Cache then enable PCICSCR Soonp bits. */
+ p4_out(0x08000000, SH7780_PCICSAR0);
+ p4_out(0x0000001B, SH7780_PCICSCR0); /* Snoop bit :On */
+
+ p4_out((SH7780_PCICR_PREFIX | SH7780_PCICR_CFIN | SH7780_PCICR_ARBM
+ | SH7780_PCICR_FTO | SH7780_PCICR_PFCS | SH7780_PCICR_PFE),
+ SH7780_PCICR);
+
+ pci_sh4_init(hose);
+ return 0;
+}
+#endif /* defined(CONFIG_PCI) && defined(CONFIG_CPU_SH7780) */
diff --git a/include/asm-sh/cpu_sh7780.h b/include/asm-sh/cpu_sh7780.h
index b0569c2..d4f824e 100644
--- a/include/asm-sh/cpu_sh7780.h
+++ b/include/asm-sh/cpu_sh7780.h
@@ -118,63 +118,63 @@
#define DBK_2 0xFE800404
/* PCI Controller */
-#define PCIECR 0xFE000008
-#define PCIVID 0xFE040000
-#define PCIDID 0xFE040002
-#define PCICMD 0xFE040004
-#define PCISTATUS 0xFE040006
-#define PCIRID 0xFE040008
-#define PCIPIF 0xFE040009
-#define PCISUB 0xFE04000A
-#define PCIBCC 0xFE04000B
-#define PCICLS 0xFE04000C
-#define PCILTM 0xFE04000D
-#define PCIHDR 0xFE04000E
-#define PCIBIST 0xFE04000F
-#define PCIIBAR 0xFE040010
-#define PCIMBAR0 0xFE040014
-#define PCIMBAR1 0xFE040018
-#define PCISVID 0xFE04002C
-#define PCISID 0xFE04002E
-#define PCICP 0xFE040034
-#define PCIINTLINE 0xFE04003C
-#define PCIINTPIN 0xFE04003D
-#define PCIMINGNT 0xFE04003E
-#define PCIMAXLAT 0xFE04003F
-#define PCICID 0xFE040040
-#define PCINIP 0xFE040041
-#define PCIPMC 0xFE040042
-#define PCIPMCSR 0xFE040044
-#define PCIPMCSRBSE 0xFE040046
-#define PCI_CDD 0xFE040047
-#define PCICR 0xFE040100
-#define PCILSR0 0xFE040104
-#define PCILSR1 0xFE040108
-#define PCILAR0 0xFE04010C
-#define PCILAR1 0xFE040110
-#define PCIIR 0xFE040114
-#define PCIIMR 0xFE040118
-#define PCIAIR 0xFE04011C
-#define PCICIR 0xFE040120
-#define PCIAINT 0xFE040130
-#define PCIAINTM 0xFE040134
-#define PCIBMIR 0xFE040138
-#define PCIPAR 0xFE0401C0
-#define PCIPINT 0xFE0401CC
-#define PCIPINTM 0xFE0401D0
-#define PCIMBR0 0xFE0401E0
-#define PCIMBMR0 0xFE0401E4
-#define PCIMBR1 0xFE0401E8
-#define PCIMBMR1 0xFE0401EC
-#define PCIMBR2 0xFE0401F0
-#define PCIMBMR2 0xFE0401F4
-#define PCIIOBR 0xFE0401F8
-#define PCIIOBMR 0xFE0401FC
-#define PCICSCR0 0xFE040210
-#define PCICSCR1 0xFE040214
-#define PCICSAR0 0xFE040218
-#define PCICSAR1 0xFE04021C
-#define PCIPDR 0xFE040220
+#define SH7780_PCIECR 0xFE000008
+#define SH7780_PCIVID 0xFE040000
+#define SH7780_PCIDID 0xFE040002
+#define SH7780_PCICMD 0xFE040004
+#define SH7780_PCISTATUS 0xFE040006
+#define SH7780_PCIRID 0xFE040008
+#define SH7780_PCIPIF 0xFE040009
+#define SH7780_PCISUB 0xFE04000A
+#define SH7780_PCIBCC 0xFE04000B
+#define SH7780_PCICLS 0xFE04000C
+#define SH7780_PCILTM 0xFE04000D
+#define SH7780_PCIHDR 0xFE04000E
+#define SH7780_PCIBIST 0xFE04000F
+#define SH7780_PCIIBAR 0xFE040010
+#define SH7780_PCIMBAR0 0xFE040014
+#define SH7780_PCIMBAR1 0xFE040018
+#define SH7780_PCISVID 0xFE04002C
+#define SH7780_PCISID 0xFE04002E
+#define SH7780_PCICP 0xFE040034
+#define SH7780_PCIINTLINE 0xFE04003C
+#define SH7780_PCIINTPIN 0xFE04003D
+#define SH7780_PCIMINGNT 0xFE04003E
+#define SH7780_PCIMAXLAT 0xFE04003F
+#define SH7780_PCICID 0xFE040040
+#define SH7780_PCINIP 0xFE040041
+#define SH7780_PCIPMC 0xFE040042
+#define SH7780_PCIPMCSR 0xFE040044
+#define SH7780_PCIPMCSRBSE 0xFE040046
+#define SH7780_PCI_CDD 0xFE040047
+#define SH7780_PCICR 0xFE040100
+#define SH7780_PCILSR0 0xFE040104
+#define SH7780_PCILSR1 0xFE040108
+#define SH7780_PCILAR0 0xFE04010C
+#define SH7780_PCILAR1 0xFE040110
+#define SH7780_PCIIR 0xFE040114
+#define SH7780_PCIIMR 0xFE040118
+#define SH7780_PCIAIR 0xFE04011C
+#define SH7780_PCICIR 0xFE040120
+#define SH7780_PCIAINT 0xFE040130
+#define SH7780_PCIAINTM 0xFE040134
+#define SH7780_PCIBMIR 0xFE040138
+#define SH7780_PCIPAR 0xFE0401C0
+#define SH7780_PCIPINT 0xFE0401CC
+#define SH7780_PCIPINTM 0xFE0401D0
+#define SH7780_PCIMBR0 0xFE0401E0
+#define SH7780_PCIMBMR0 0xFE0401E4
+#define SH7780_PCIMBR1 0xFE0401E8
+#define SH7780_PCIMBMR1 0xFE0401EC
+#define SH7780_PCIMBR2 0xFE0401F0
+#define SH7780_PCIMBMR2 0xFE0401F4
+#define SH7780_PCIIOBR 0xFE0401F8
+#define SH7780_PCIIOBMR 0xFE0401FC
+#define SH7780_PCICSCR0 0xFE040210
+#define SH7780_PCICSCR1 0xFE040214
+#define SH7780_PCICSAR0 0xFE040218
+#define SH7780_PCICSAR1 0xFE04021C
+#define SH7780_PCIPDR 0xFE040220
/* DMAC */
#define DMAC_SAR0 0xFC808020
diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h
new file mode 100644
index 0000000..821961f
--- /dev/null
+++ b/include/asm-sh/pci.h
@@ -0,0 +1,46 @@
+/*
+ * SH4 PCI Controller (PCIC) for U-Boot.
+ * (C) Dustin McIntire (dustin at sensoria.com)
+ * (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ * (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
+ *
+ * u-boot/include/asm-sh/pci.h
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _ASM_PCI_H_
+#define _ASM_PCI_H_
+
+#include <pci.h>
+
+#if defined(CONFIG_CPU_SH7780)
+int pci_sh7780_init(struct pci_controller *hose);
+#else
+#error "Not support PCI."
+#endif
+
+/* PCI dword read for sh4 */
+int pci_sh4_read_config_dword(struct pci_controller *hose,
+ pci_dev_t dev, int offset, u32 *value);
+
+/* PCI dword write for sh4 */
+int pci_sh4_write_config_dword(struct pci_controller *hose,
+ pci_dev_t dev, int offset, u32 value);
+
+#endif /* _ASM_PCI_H_ */
diff --git a/lib_sh/board.c b/lib_sh/board.c
index 2cd60d7..883c381 100644
--- a/lib_sh/board.c
+++ b/lib_sh/board.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2007
+ * Copyright (C) 2007,2008
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* This program is free software; you can redistribute it and/or
@@ -95,6 +95,14 @@ static int sh_marubun_init(void)
}
#endif /* (CONFIG_CMD_IDE) */
+#if defined(CONFIG_PCI)
+static int sh_pci_init(void)
+{
+ pci_init();
+ return 0;
+}
+#endif /* CONFIG_PCI */
+
static int sh_mem_env_init(void)
{
mem_malloc_init();
@@ -141,6 +149,9 @@ init_fnc_t *init_sequence[] =
#if defined(CONFIG_CMD_NAND)
sh_nand_init, /* Flash memory (NAND) init */
#endif
+#if defined(CONFIG_PCI)
+ sh_pci_init, /* PCI Init */
+#endif
devices_init,
console_init_r,
interrupt_init,
--
next reply other threads:[~2008-03-05 8:05 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-03-05 8:05 goda.yusuke [this message]
2008-03-07 6:36 ` [U-Boot-Users] [PATCH] sh: Add support PCI of SuperH and SH7780 Nobuhiro Iwamatsu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=47CE5448.4040408@renesas.com \
--to=goda.yusuke@renesas.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.