Re: [PATCH 1/5] ixgbe: Introduce MSI-X queue vector code

[Jeff Garzik <jeff@garzik.org>]

Auke Kok wrote:
> From: Ayyappan Veeraiyan <ayyappan.veeraiyan@intel.com>
> 
> This code abstracts the per-queue MSI-X interrupt vector into
> a queue vector layer. This abstraction is needed since there can
> be many more queues than available MSI-X vectors in a machine.
> 
> The MSI-X irq vectors are remapped to a shared queue vector which
> can point to several (both RX and TX) hardware queues. The NAPI
> algorithm then cleans the appropriate ring/queues on interrupt
> or poll.
> 
> The remapping is a delicate and complex calculation to make sure
> that we're not unbalancing the irq load, and spreads the irqs
> as much as possible, and may combine RX and TX flows onto the
> same queue vector.
> 
> This effectively enables receive flow hashing across vectors
> and helps irq load balance across CPUs.
> 
> Signed-off-by: Ayyappan Veeraiyan <ayyappan.veeraiyan@intel.com>
> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
> Acked-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
> Acked-by: Waskiewicz Jr, Peter P <peter.p.waskiewicz.jr@intel.com>

applied 1-5 to #upstream (2.6.26)



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