From: "H. Peter Anvin" <hpa@zytor.com>
To: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>,
Venki Pallipadi <venkatesh.pallipadi@intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Andrew Morton <akpm@linux-foundation.org>,
kernel list <linux-kernel@vger.kernel.org>,
suresh.b.siddha@intel.com
Subject: Re: [PATCH] x86: pat cpu feature bit setting for known cpus
Date: Tue, 25 Mar 2008 17:10:52 -0700 [thread overview]
Message-ID: <47E9948C.3070807@zytor.com> (raw)
In-Reply-To: <86802c440803251608v6f09f531x57d9688601cc84fd@mail.gmail.com>
Yinghai Lu wrote:
> On Tue, Mar 25, 2008 at 4:06 PM, H. Peter Anvin <hpa@zytor.com> wrote:
>> Yinghai Lu wrote:
>> >>
>> >> By the way, I want to clarify: I didn't mean it was *intended* as
>> >> vendor-lockin, just that it's an undesirable effect of this.
>> >
>> > if the PAT works, we may need to trim the memory according to MTRR, right?
>> >
>>
>> That doesn't seem like it's specific to PAT?
>
> could page table to set WRBACK the range that is not covered by MTRR in e820..
>
We have to trim anyway... lest we end up using uncached memory and then
we're in a world of hurt.
-hpa
next prev parent reply other threads:[~2008-03-26 0:12 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-03-25 6:24 [PATCH] x86: pat cpu feature bit setting for known cpus Yinghai Lu
2008-03-25 10:58 ` Ingo Molnar
2008-03-25 13:38 ` H. Peter Anvin
2008-03-25 18:03 ` Yinghai Lu
2008-03-25 19:08 ` Venki Pallipadi
2008-03-25 20:08 ` Ingo Molnar
2008-03-25 20:38 ` H. Peter Anvin
2008-03-25 23:01 ` H. Peter Anvin
2008-03-25 23:05 ` Yinghai Lu
2008-03-25 23:06 ` H. Peter Anvin
2008-03-25 23:08 ` Yinghai Lu
2008-03-25 23:38 ` Pallipadi, Venkatesh
2008-03-26 0:01 ` Yinghai Lu
2008-03-26 0:10 ` H. Peter Anvin [this message]
2008-03-28 13:41 ` Pavel Machek
2008-03-28 14:51 ` Yinghai Lu
2008-03-30 11:43 ` dean gaudet
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