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bh=MKHpfG9FXZBRRV2MzUmsKoBDMrVngBIFiVIQAk/+QT4=; b=x8s3e4Cn2x+dOCKmc9hckekz+B0vlGLGChkHD95QauWurwh9rKYWr7JDXVdiLJVK4PwPcd 3WcNFco7+jtDi3/5GhWMW0/GFw6A6U/BCY4SR2MKIwNypKR/MDZw8DI54tdwiznnuETGWt ldX3FC3niPA4g3xlFrgTkf3mOlYknS2lYYJRyK34uk2+xY+A2uR5uWDmj/Kn9Iq9AP9bRx 9hxwqEpIoTsKMHtXlE0vU8rK8/OIcf23jjAoBvJ2zSVzx7SgYn+wTpx6yJ6WzWMdRmSDSJ EXB8hFmiy5SG7KKp6qnIHuqMEW+oTxirjDua4lzhoknscg1f56bmGy3GNAopkA== Message-ID: <480f15e2-e045-46b7-89af-1fbcefd3c4eb@bootlin.com> Date: Mon, 31 Aug 2026 14:15:04 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next 1/2] net: stmmac: dwmac4: Read the UC filter size from hardware capabilities To: Nicolai Buchwitz Cc: Andrew Lunn , Jakub Kicinski , davem@davemloft.net, Eric Dumazet , Paolo Abeni , Simon Horman , Maxime Coquelin , Alexandre Torgue , Russell King , thomas.petazzoni@bootlin.com, =?UTF-8?Q?Alexis_Lothor=C3=A9?= , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com References: <20260831070121.349778-1-maxime.chevallier@bootlin.com> <20260831070121.349778-2-maxime.chevallier@bootlin.com> <2631c832d5aebc56e152628132494545@tipi-net.de> Content-Language: en-US From: Maxime Chevallier In-Reply-To: <2631c832d5aebc56e152628132494545@tipi-net.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260831_051519_904153_AE98C5B4 X-CRM114-Status: GOOD ( 18.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/31/26 14:04, Nicolai Buchwitz wrote: > Hi Maxime > > On 31.8.2026 09:01, Maxime Chevallier wrote: >> dwmac4 has multiple banks of perfect filter entries, independently >> configurable during IP integration. >> >> The multi_addr bank reports a number between 0 and 31 corresponding to >> the actual number of entries in that bank, while the 32 and 64 banks >> are all-or-nothing. >> >> Expose these caps over debugfs as well. >> >> Signed-off-by: Maxime Chevallier >> --- > >> [...] > >> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h >> index 6382836828ba..89368e34a388 100644 >> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h >> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h >> @@ -176,7 +176,9 @@ enum power_event { >> >>  /* MAC HW features0 bitmap */ >>  #define GMAC_HW_FEAT_SAVLANINS        BIT(27) >> -#define GMAC_HW_FEAT_ADDMAC        BIT(18) >> +#define GMAC_HW_FEAT_MACADR64SEL    BIT(24) >> +#define GMAC_HW_FEAT_MACADR32SEL    BIT(23) >> +#define GMAC_HW_FEAT_ADDMAC        GENMASK(22, 18) >>  #define GMAC_HW_FEAT_RXCOESEL        BIT(16) >>  #define GMAC_HW_FEAT_TXCOSEL        BIT(14) >>  #define GMAC_HW_FEAT_EEESEL        BIT(13) >> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c >> index 23ffe1adcd0d..14ac3f0e51f7 100644 >> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c >> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c >> @@ -388,6 +388,8 @@ static int dwmac4_get_hw_feature(void __iomem *ioaddr, >>      dma_cap->half_duplex = (hw_cap & GMAC_HW_FEAT_HDSEL) >> 2; >>      dma_cap->vlhash = (hw_cap & GMAC_HW_FEAT_VLHASH) >> 4; >>      dma_cap->multi_addr = (hw_cap & GMAC_HW_FEAT_ADDMAC) >> 18; > > Now that ADDMAC has grown from single bit to a mask, the hardcoded 18 has to match > dwmac4.h. So IMHO it would make sense to use FIELD_GET() here (like actphyif)? It's hardcoded all over, if you look at how all the other fields from the features are read. I can change it if you really think it's worth, however I'd rather do a proper cleanup of how all the properties are read at once :) > >> +    dma_cap->additional_32_addr = (hw_cap & GMAC_HW_FEAT_MACADR32SEL) >> 23; >> +    dma_cap->additional_64_addr = (hw_cap & GMAC_HW_FEAT_MACADR64SEL) >> 24; >>      dma_cap->pcs = (hw_cap & GMAC_HW_FEAT_PCSSEL) >> 3; >>      dma_cap->sma_mdio = (hw_cap & GMAC_HW_FEAT_SMASEL) >> 5; >>      dma_cap->pmt_remote_wake_up = (hw_cap & GMAC_HW_FEAT_RWKSEL) >> 6; >> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c >> index f2fc89176654..a885f8cfef21 100644 >> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c >> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c >> @@ -6580,6 +6580,18 @@ static int stmmac_dma_cap_show(struct seq_file *seq, void *v) >>          seq_printf(seq, >>                 "\tNumber of Additional MAC address registers: %d\n", >>                 priv->dma_cap.multi_addr); >> +    } else if (priv->plat->core_type == DWMAC_CORE_GMAC4) { >> +        seq_printf(seq, >> +               "\tNumber of MAC address registers (1-31): %d\n", >> +               priv->dma_cap.multi_addr); >> +        seq_printf(seq, >> +               "\tAdditional 32 MAC address registers (32-63): %s\n", >> +               priv->dma_cap.additional_32_addr ? "Y" : "N"); >> +        seq_printf(seq, >> +               "\tAdditional 64 MAC address registers (64-127): %s\n", >> +               priv->dma_cap.additional_64_addr ? "Y" : "N"); >> +        seq_printf(seq, "\tHash Filter: %s\n", >> +               (priv->dma_cap.hash_filter) ? "Y" : "N"); > > hash_filter seems to be only set in dwmac1000_dma.c? So on dwmac4 it would always print N? Yeah but dwmac4 has a hash filter, but same as the UC filter it's just not plumbed in :/ Let's leave this flag here, hash filter addition for MC filtering is coming-up, so let's not drop it now only to re-enable it after, one of the other wonderful discoveries found by running the selftests... > >>      } else { >>          seq_printf(seq, "\tHash Filter: %s\n", >>                 (priv->dma_cap.hash_filter) ? "Y" : "N"); > > Thanks, > Nicolai Maxime