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From: Josua Mayer <josua@solid-run.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@bootlin.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Rabeeh Khoury <rabeeh@solid-run.com>,
	Yazan Shhady <yazan.shhady@solid-run.com>,
	Mikhail Anikin <mikhail.anikin@solid-run.com>,
	Jon Nettleton <jon@solid-run.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>
Subject: Re: [PATCH 2/2] clk: mvebu: cp110 add CLK_IGNORE_UNUSED to pcie_x10, pcie_x11 & pcie_x4
Date: Thu, 30 Oct 2025 15:51:35 +0000	[thread overview]
Message-ID: <481bf79f-0cec-498f-9827-f4c6dfd6c14e@solid-run.com> (raw)
In-Reply-To: <05d450d8-8df9-490f-ac53-3f45544f1c29@lunn.ch>

I missed a colon in the subject line "cp110:",
should I roll v2 for this?

Am 30.10.25 um 16:33 schrieb Andrew Lunn:
> On Thu, Oct 30, 2025 at 04:16:26PM +0100, Josua Mayer wrote:
>> CP110 based platforms rely on the bootloader for pci port
>> initialization.
>> TF-A actively prevents non-uboot re-configuration of pci lanes, and many
>> boards do not have software control over the pci card reset.
>>
>> If a pci port had link at boot-time and the clock is stopped at a later
>> point, the link fails and can not be recovered.
>>
>> PCI controller driver probe - and by extension ownership of a driver for
>> the pci clocks - may be delayed especially on large modular kernels,
>> causing the clock core to start disabling unused clocks.
>>
>> Add the CLK_IGNORE_UNUSED flag to the three pci port's clocks to ensure
>> they are not stopped before the pci controller driver has taken
>> ownership and tested for an existing link.
>>
>> This fixes failed pci link detection when controller driver probes late,
>> e.g. with arm64 defconfig and CONFIG_PHY_MVEBU_CP110_COMPHY=m.
> Seems like a reasonable compromise, given that TF-A could be classed
> as broken. This must also prevent suspend/resume powering off PCI
> devices, and then reconnecting them on resume.
Currently pcie-armada8k (unlike e.g. pci-imx6) does not currently define
any dev_pm_ops - so we should be safe from any power-management.
>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
>
>     Andrew

  reply	other threads:[~2025-10-30 15:52 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-30 15:16 [PATCH 0/2] clk: mvebu: cp110 add CLK_IGNORE_UNUSED to pcie_x10, pcie_x11 & pcie_x4 Josua Mayer
2025-10-30 15:16 ` [PATCH 1/2] Revert "arm64: dts: marvell: cn9132-clearfog: fix multi-lane pci x2 and x4 ports" Josua Mayer
2025-11-10 14:19   ` Gregory CLEMENT
2025-10-30 15:16 ` [PATCH 2/2] clk: mvebu: cp110 add CLK_IGNORE_UNUSED to pcie_x10, pcie_x11 & pcie_x4 Josua Mayer
2025-10-30 15:33   ` Andrew Lunn
2025-10-30 15:51     ` Josua Mayer [this message]
2025-11-10 14:20       ` Gregory CLEMENT

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