From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jean Guyader <jean.guyader@eu.citrix.com>
Subject: Re: [PATCH] hvmloader: pci range cache policy
Date: Fri, 23 May 2008 17:08:05 +0100
Message-ID: <4836EBE5.40003@eu.citrix.com>
References: <C45CA898.18E77%keir.fraser@eu.citrix.com>
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To: Keir Fraser <keir.fraser@eu.citrix.com>
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Yes, indeed. Sorry for the noise.

Keir Fraser wrote:
> The code is correct as it is. The frame number goes into bits 12 upwards of
> the MSR, and this is equivalent to writing the full address into bits 0
> upwards.
> 
>  -- Keir
> 

-- 
Jean Guyader