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dkim=pass (2048-bit key; secure) header.d=gmx.com header.i=boogiepop@gmx.com header.b="WGTlwvR6"; dkim-atps=neutral X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Boogie via U-Boot Reply-To: Boogie Errors-To: u-boot-bounces@lists.u-boot-project.org Sender: "U-Boot" Hi Quentin On 7/22/26 11:28, Quentin Schulz wrote: > Hi H=C3=BCseyin, Johan, >=20 > On 7/22/26 12:56 AM, Boogie wrote: >> [You don't often get email from boogiepop@gmx.com. Learn why this is=20 >> important at https://aka.ms/LearnAboutSenderIdentification ] >> >> Hello Quentin >> >> I had reported this bug to Johan so i can give detailed explanation. >> >> The bug was really the lock of "&& nfc->selected_bank =3D=3D 0" not exi= sting >> for write_page_* variants. >> >> When rockchip nfc was reading, it required bootblks to be a part of the >> first nand chip only with the condition "nfc->selected_bank =3D=3D 0". = But >> when writing it interpreted 'all' nand chips first boot_blks as boot=20 >> blocks. >> >=20 > OK ECC strength mismatch between what's written and read. >=20 >> The practical problem. I had mentioned this in V1 and give more explici= t >> details here. >> >> I have 2 nand chips, and a partition (linux below) starts in nand chip = 1 >> (CS=3D0 in below) and ends in chip2 (CS=3D2 below). And i am using UBI = on >> top of that mtd. >> >> nand@0 { >> =C2=A0=C2=A0=C2=A0=C2=A0 reg =3D <0>, <2>; >> =C2=A0=C2=A0=C2=A0=C2=A0 label =3D "rk-nand-0"; >> =C2=A0=C2=A0=C2=A0=C2=A0 nand-bus-width =3D <8>; >> =C2=A0=C2=A0=C2=A0=C2=A0 nand-ecc-mode =3D "hw"; >> =C2=A0=C2=A0=C2=A0=C2=A0 nand-ecc-step-size =3D <1024>; >> =C2=A0=C2=A0=C2=A0=C2=A0 nand-ecc-strength =3D <40>; >> =C2=A0=C2=A0=C2=A0=C2=A0 nand-is-boot-medium; >> =C2=A0=C2=A0=C2=A0=C2=A0 rockchip,boot-blks =3D <8>; >> =C2=A0=C2=A0=C2=A0=C2=A0 rockchip,boot-ecc-strength =3D <24>; >> >> =C2=A0=C2=A0=C2=A0=C2=A0 // block 14 - end >> =C2=A0=C2=A0=C2=A0=C2=A0 linux@1C00000 { >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 label =3D "linux"; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 reg =3D <0x0 0x1C00000= 0x3 0xFE400000>; >> =C2=A0=C2=A0=C2=A0=C2=A0 }; >> }; >> >> When i create the UBI volume the middle of this partition where the >> blocks are at 2nd chip block0-7, will be written in boot block strength >> [ECC:1024/24] but will be read with normal strength [ECC:1024/40]. >> >> This causes first UBI creation to be successful, and next scan to fail >> due to written strength is different that read. >> >> You dont actually need to use UBI at all, any time you write those >> sectors, you wont be able to read them. A workaround it to mark them >> bad, but this is not nice, since the blocks are completely fine. >> >> Rockchip NFC technically as minimum needs to know rockchip,boot-blks, & >> rockchip,boot-ecc-strength props only. Currently the checking condition >> is rockchip,boot-blks & applied affect is rockchip,boot-ecc-strength. >> >> The bug is this is only applicable to first chip not all chips. >> >=20 > "is only applied" I think you meant here instead? Or are you implying=20 > that you want chip 0 to have rockchip,boot-blks and rockchip,boot-ecc-= =20 > strength applied to it, but NOT chip 2 even though they are listed in=20 > the same node? >=20 Yes boot-blks and rockchip,boot-ecc-strength must be applied to only to=20 the chip CS=3D0. This is how the bootrom works, bootrom does not look for= =20 an idb image [tpl/spl] in a chip which is not CS =3D=3D 0. >> NAND_IS_BOOT_MEDIUM is actually coming from mainline linux. Similar >> bootrom tricks are also available in other socs. And detection of boot >> rom blocks is not always straight forward as rockchip's >> rockchip,boot-blks, they have to do some "if" case acrobatics to detect >> those. For simplicity reasons mainline linux introduced a global flag >> NAND_IS_BOOT_MEDIUM and it is applied to other socs as well. >> >=20 > rockchip,boot-blks and rockchip,boot-ecc-strength properties explicitly= =20 > require nand-is-boot-medium property to be set in order to be used=20 > (though they don't enforce it via YAML/JSON schema; although it is=20 > enforced by the kernel driver). So a device tree that doesn't follow=20 > those restrictions is deemed invalid and we are not aiming at supporting= =20 > them. This means that the last sentence in Johan's commit log: >=20 > It is now the users responsibility to apply the device tree > property "nand-is-boot-medium" to only NAND chip 0. >=20 > is redundant, as we already expect the users to set it for the=20 > appropriate NAND chip(s). (just adding this piece of information here,= =20 > not disputing anything either of you said) >=20 >> Since this "&& nfc->selected_bank =3D=3D 0" fix is exactly at the same = line >> with mainline changes of NAND_IS_BOOT_MEDIUM check, i think Johan also >> integrated both at the same line. >> >=20 > @Johan, can you please reorder the condition in rk_nfc_write_page_hwecc= =20 > and rk_nfc_read_page_hwecc to match the order in the Linux kernel=20 > driver? (the NAND_IS_BOOT_MEDIUM is last). >=20 >> In u-boot only mk808 is using nfc with boot blocks and it is already >> marking the nand device as boot medium, so the code change should not >> break existing devices. >> >=20 > Correct. >=20 >> Additional note: Linux mainline also is lacking the "nfc->selected_bank >> =3D=3D 0" check, so i think similar patch should got to linux as well. >> >=20 > Not sure what you mean here as Johan removed both checks in the patch. You are right, sorry for misleading, we had discussed to put a lock to=20 with "&& nfc->selected_bank =3D=3D 0" for both read and write to uniform.= =20 But now i noticed that this patch only syncs with mainline and=20 downgrades the ECC to bootrom strength for all chips first boot blocks.=20 This also works, but of course the side affect is reduced ecc strength=20 (if your current one is higher, and most likely is). >=20 > [...] >=20 > As far as I could tell, Johan's patch makes U-Boot behave the same as=20 > the Linux kernel for a multi-chip node, so with the reorder I asked=20 > above and a much more precise commit log providing the usecase and=20 > misbehavior, and also pointing at the Linux kernel doing the exact same= =20 > thing as this patch, I think we're going in the right direction. >=20 > Cheers, > Quentin