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From: "André Schwarz" <Andre.Schwarz@matrix-vision.de>
To: Segher Boessenkool <segher@kernel.crashing.org>
Cc: Scott Wood <scottwood@freescale.com>,
	linux-ppc list <linuxppc-dev@ozlabs.org>
Subject: Re: MPC83xx ipic problem
Date: Mon, 30 Jun 2008 19:14:19 +0200	[thread overview]
Message-ID: <4869146B.8050609@matrix-vision.de> (raw)
In-Reply-To: <7dd3673e01cb808007902b12a63d0399@kernel.crashing.org>

Segher,

actually I'm the hardware designer ... :-) .... having trouble with=20
software.

The outputs are open-drain and can be connected (wired-or) together.
Otherwise "shared irq" wouldn't be possible that easy.


cheers,
Andr=E9




Segher Boessenkool wrote:
>> interrupt-map =3D <0x5800 0 0 1 &ipic 0x30 0x8      -> FPGA @ IRQ0
>>                  0x6000 0 0 1 &ipic 0x11 0x8      -> miniPCI INTA @ IR=
Q1
>>                  0x6000 0 0 2 &ipic 0x11 0x8>;    -> miniPCI INTB @ IR=
Q1
>>
>> Is it legal to use a single irq pin twice ?
>
> The device tree simply describes the hardware; if the hardware
> connects both INTXs to the same IPIC interrupt pin, then it is
> correct.  You'll have to ask a hardware designer whether it is
> okay to just tie the two lines together; I believe it is, for
> PCI, but you better ask someone who really knows :-)
>
>
> Segher
>


MATRIX VISION GmbH, Talstra=DFe 16, DE-71570 Oppenweiler  - Registergeric=
ht: Amtsgericht Stuttgart, HRB 271090
Gesch=E4ftsf=FChrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner

  reply	other threads:[~2008-06-30 17:14 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-06-30 15:34 MPC83xx ipic problem André Schwarz
2008-06-30 16:36 ` Segher Boessenkool
2008-06-30 17:14   ` André Schwarz [this message]
2008-06-30 19:03 ` Scott Wood
2008-07-01  7:45   ` André Schwarz

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