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From: Jeremy Fitzhardinge <jeremy@goop.org>
To: Ingo Molnar <mingo@elte.hu>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>,
	Andi Kleen <andi@firstfloor.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/2] x86: implement multiple queues for smp function	call IPIs
Date: Thu, 31 Jul 2008 21:58:50 -0700	[thread overview]
Message-ID: <4892980A.2010101@goop.org> (raw)
In-Reply-To: <20080731224202.GB22426@elte.hu>

Ingo Molnar wrote:
> Yes on the 64-bit side we've had NUM_INVALIDATE_TLB_VECTORS (==8) for a 
> long time, but note that 64-bit is obviously for more modern CPUs. What 
> i'm mindful about (i'm not _that_ worried) are fragile APICs and unknown 
> erratas.
>   

Well, the whole exercise is only useful if you have a relatively large 
number of CPUs, which presumably means you have relatively modern 
APICs.  If we set the number of queues to 1 for < 4 CPUs, would that 
avoid the problem APICs?

    J

  reply	other threads:[~2008-08-01  4:59 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-07-29 23:32 [PATCH 2/2] x86: implement multiple queues for smp function call IPIs Jeremy Fitzhardinge
2008-07-29 23:43 ` Jeremy Fitzhardinge
2008-07-30  0:13 ` Andi Kleen
2008-07-30  0:44   ` Jeremy Fitzhardinge
2008-07-30  4:55 ` Nick Piggin
2008-07-31 22:08 ` Ingo Molnar
2008-07-31 22:12   ` Andi Kleen
2008-07-31 22:23   ` Jeremy Fitzhardinge
2008-07-31 22:42     ` Ingo Molnar
2008-08-01  4:58       ` Jeremy Fitzhardinge [this message]
2008-08-01  9:09         ` Ingo Molnar
2008-08-01 14:17           ` Andi Kleen

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