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From: Jan Kiszka <jan.kiszka@siemens.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 1/2] De-assert ISA PIC IRQs properly
Date: Wed, 20 Aug 2008 17:16:05 +0200	[thread overview]
Message-ID: <48AC3535.2080506@siemens.com> (raw)
In-Reply-To: <48A998AB.5080409@web.de>

[ Taking latest isapc changes into account. ]

In case the PIC IRQ gets de-asserted on an isapc machine, we also have
to reset CPU_INTERRUPT_HARD. This is what older qemu (before the
routing-through-APIC changes) used to do as well.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
 hw/pc.c |   10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

Index: b/hw/pc.c
===================================================================
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -118,17 +118,19 @@ static void pic_irq_request(void *opaque
 {
     CPUState *env = first_cpu;
 
-    if (!level)
-        return;
-
     if (env->apic_state) {
+        if (!level)
+            return;
         while (env) {
             if (apic_accept_pic_intr(env))
                 apic_local_deliver(env, APIC_LINT0);
             env = env->next_cpu;
         }
     } else {
-        cpu_interrupt(env, CPU_INTERRUPT_HARD);
+        if (level)
+            cpu_interrupt(env, CPU_INTERRUPT_HARD);
+        else
+            cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
     }
 }
 

  reply	other threads:[~2008-08-20 15:16 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-08-18 15:43 [Qemu-devel] [RESEND][PATCH] De-assert PIC IRQs properly at APIC level Jan Kiszka
2008-08-20 15:16 ` Jan Kiszka [this message]
2008-08-21  3:15   ` [Qemu-devel] [PATCH 1/2] De-assert ISA PIC IRQs properly Aurelien Jarno
2008-08-20 15:16 ` [Qemu-devel] [PATCH 2/2] De-assert PIC IRQs properly at APIC level Jan Kiszka
2008-08-21  3:15   ` Aurelien Jarno

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