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From: Andre Schwarz <andre.schwarz@matrix-vision.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] MPC83xx DDR Controller setup
Date: Tue, 26 Aug 2008 15:26:16 +0200	[thread overview]
Message-ID: <48B40478.8060606@matrix-vision.de> (raw)

Kim,

can you (or anybody else) tell me what the following bit means on MPC834x ?
Actually it's set inside the CLK_CNTL register of the DDR controller.
It's completely missing in my (latest) datasheet's register definition ...

include/mpc83xx.h:#define DDR_SDRAM_CLK_CNTL_SS_EN              0x80000000



regards,
Andre

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             reply	other threads:[~2008-08-26 13:26 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-08-26 13:26 Andre Schwarz [this message]
2008-08-26 15:20 ` [U-Boot] MPC83xx DDR Controller setup Kim Phillips
2008-08-27  9:12   ` Andre Schwarz

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