Index: hw/mips.h
===================================================================
--- hw/mips.h	(revision 5171)
+++ hw/mips.h	(working copy)
@@ -25,7 +25,6 @@
 
 /* mips_timer.c */
 extern void cpu_mips_clock_init(CPUState *);
-extern void cpu_mips_irqctrl_init (void);
 
 /* rc4030.c */
 qemu_irq *rc4030_init(qemu_irq timer, qemu_irq jazz_bus);
Index: hw/mips_malta.c
===================================================================
--- hw/mips_malta.c	(revision 5171)
+++ hw/mips_malta.c	(working copy)
@@ -878,7 +878,6 @@
     /* Init internal devices */
     cpu_mips_irq_init_cpu(env);
     cpu_mips_clock_init(env);
-    cpu_mips_irqctrl_init();
 
     /* Interrupt controller */
     /* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */
Index: hw/mips_mipssim.c
===================================================================
--- hw/mips_mipssim.c	(revision 5171)
+++ hw/mips_mipssim.c	(working copy)
@@ -165,7 +165,6 @@
     /* Init CPU internal devices. */
     cpu_mips_irq_init_cpu(env);
     cpu_mips_clock_init(env);
-    cpu_mips_irqctrl_init();
 
     /* Register 64 KB of ISA IO space at 0x1fd00000. */
     isa_mmio_init(0x1fd00000, 0x00010000);
Index: hw/mips_r4k.c
===================================================================
--- hw/mips_r4k.c	(revision 5171)
+++ hw/mips_r4k.c	(working copy)
@@ -225,7 +225,6 @@
     /* Init CPU internal devices */
     cpu_mips_irq_init_cpu(env);
     cpu_mips_clock_init(env);
-    cpu_mips_irqctrl_init();
 
     /* The PIC is attached to the MIPS CPU INT0 pin */
     i8259 = i8259_init(env->irq[2]);
Index: hw/mips_timer.c
===================================================================
--- hw/mips_timer.c	(revision 5171)
+++ hw/mips_timer.c	(working copy)
@@ -4,10 +4,6 @@
 
 #define TIMER_FREQ	100 * 1000 * 1000
 
-void cpu_mips_irqctrl_init (void)
-{
-}
-
 /* XXX: do not use a global */
 uint32_t cpu_mips_get_random (CPUState *env)
 {
Index: target-mips/exec.h
===================================================================
--- target-mips/exec.h	(revision 5171)
+++ target-mips/exec.h	(working copy)
@@ -33,7 +33,6 @@
 void do_raise_exception_err (uint32_t exception, int error_code);
 void do_raise_exception (uint32_t exception);
 
-void cpu_mips_irqctrl_init (void);
 uint32_t cpu_mips_get_random (CPUState *env);
 uint32_t cpu_mips_get_count (CPUState *env);
 void cpu_mips_store_count (CPUState *env, uint32_t value);