From: "Jan Beulich" <jbeulich@novell.com>
To: "Ingo Molnar" <mingo@elte.hu>
Cc: "Yinghai Lu" <yhlu.kernel@gmail.com>, <tglx@linutronix.de>,
<linux-kernel@vger.kernel.org>, <hpa@zytor.com>
Subject: Re: [PATCH] x86: x86_{phys,virt}_bits field also for i386 (v2)
Date: Mon, 08 Sep 2008 11:50:21 +0100 [thread overview]
Message-ID: <48C51F8D.76E4.0078.0@novell.com> (raw)
In-Reply-To: <20080905150030.GD10292@elte.hu>
>>> Ingo Molnar <mingo@elte.hu> 05.09.08 17:00 >>>
>
>* Jan Beulich <jbeulich@novell.com> wrote:
>
>> Make the x86_{phys,virt}_bits common for 32- and 64-bits, and use the
>> former in ioremap's phys_addr_valid() check also on 32bit/PAE.
>>
>> Signed-off-by: Jan Beulich <jbeulich@novell.com>
>>
>> ---
>> arch/x86/kernel/cpu/common.c | 17 +++++++++++++++++
>> arch/x86/mm/ioremap.c | 15 ++++++---------
>> include/asm-x86/processor.h | 4 ++--
>> 3 files changed, 25 insertions(+), 11 deletions(-)
>
>hm, the cpu/common.c bits just got reworked massively in tip/master.
>I've tried a blind merge (see the patch below) but at least the first
>hunk looks wrong. Mind looking at how to merge this?
This is my take at it:
Make the x86_{phys,virt}_bits common for 32- and 64-bits, and use the
former in ioremap's phys_addr_valid() check also on 32bit/PAE.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
---
arch/x86/kernel/cpu/common.c | 22 +++++++++++++++++++++-
arch/x86/mm/ioremap.c | 13 ++++++-------
include/asm-x86/processor.h | 4 ++--
3 files changed, 29 insertions(+), 10 deletions(-)
--- linux-x86.orig/arch/x86/kernel/cpu/common.c
+++ linux-x86/arch/x86/kernel/cpu/common.c
@@ -472,14 +472,20 @@ static void __cpuinit get_cpu_cap(struct
if (xlvl >= 0x80860001)
c->x86_capability[2] = cpuid_edx(0x80860001);
}
+#endif
if (c->extended_cpuid_level >= 0x80000008) {
u32 eax = cpuid_eax(0x80000008);
c->x86_virt_bits = (eax >> 8) & 0xff;
c->x86_phys_bits = eax & 0xff;
+ /* CPUID workaround for Intel 0F33/0F34 CPU */
+ if (c->x86_vendor == X86_VENDOR_INTEL
+ && c->x86 == 0xF && c->x86_model == 0x3
+ && (c->x86_mask == 0x3
+ || c->x86_mask == 0x4))
+ c->x86_phys_bits = 36;
}
-#endif
if (c->extended_cpuid_level >= 0x80000007)
c->x86_power = cpuid_edx(0x80000007);
@@ -500,6 +506,8 @@ static void __init early_identify_cpu(st
c->x86_clflush_size = 64;
#else
c->x86_clflush_size = 32;
+ c->x86_phys_bits = 32;
+ c->x86_virt_bits = 32;
#endif
c->x86_cache_alignment = c->x86_clflush_size;
@@ -512,6 +520,11 @@ static void __init early_identify_cpu(st
cpu_detect(c);
+#ifdef CONFIG_X86_32
+ if (cpu_has(c, X86_FEATURE_PAE) || cpu_has(c, X86_FEATURE_PSE36))
+ c->x86_phys_bits = 36;
+#endif
+
get_cpu_vendor(c);
get_cpu_cap(c);
@@ -635,6 +648,8 @@ static void __cpuinit identify_cpu(struc
#else
c->cpuid_level = -1; /* CPUID not detected */
c->x86_clflush_size = 32;
+ c->x86_phys_bits = 32;
+ c->x86_virt_bits = 32;
#endif
c->x86_cache_alignment = c->x86_clflush_size;
memset(&c->x86_capability, 0, sizeof c->x86_capability);
@@ -652,6 +667,11 @@ static void __cpuinit identify_cpu(struc
generic_identify(c);
+#ifdef CONFIG_X86_32
+ if (cpu_has(c, X86_FEATURE_PAE) || cpu_has(c, X86_FEATURE_PSE36))
+ c->x86_phys_bits = 36;
+#endif
+
if (this_cpu->c_identify)
this_cpu->c_identify(c);
--- linux-x86.orig/arch/x86/mm/ioremap.c
+++ linux-x86/arch/x86/mm/ioremap.c
@@ -22,13 +22,17 @@
#include <asm/pgalloc.h>
#include <asm/pat.h>
-#ifdef CONFIG_X86_64
-
static inline int phys_addr_valid(unsigned long addr)
{
+#ifdef CONFIG_RESOURCES_64BIT
return addr < (1UL << boot_cpu_data.x86_phys_bits);
+#else
+ return 1;
+#endif
}
+#ifdef CONFIG_X86_64
+
unsigned long __phys_addr(unsigned long x)
{
if (x >= __START_KERNEL_map) {
@@ -47,11 +51,6 @@ EXPORT_SYMBOL(__phys_addr);
#else
-static inline int phys_addr_valid(unsigned long addr)
-{
- return 1;
-}
-
#ifdef CONFIG_DEBUG_VIRTUAL
unsigned long __phys_addr(unsigned long x)
{
--- linux-x86.orig/include/asm-x86/processor.h
+++ linux-x86/include/asm-x86/processor.h
@@ -74,8 +74,6 @@ struct cpuinfo_x86 {
#else
/* Number of 4K pages in DTLB/ITLB combined(in pages): */
int x86_tlbsize;
- __u8 x86_virt_bits;
- __u8 x86_phys_bits;
/* CPUID returned core id bits: */
__u8 x86_coreid_bits;
#endif
@@ -100,6 +98,8 @@ struct cpuinfo_x86 {
u16 apicid;
u16 initial_apicid;
u16 x86_clflush_size;
+ u8 x86_virt_bits;
+ u8 x86_phys_bits;
#ifdef CONFIG_SMP
/* number of cores as seen by the OS: */
u16 booted_cores;
next prev parent reply other threads:[~2008-09-08 10:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-09-05 12:07 [PATCH] x86: x86_{phys,virt}_bits field also for i386 (v2) Jan Beulich
2008-09-05 15:00 ` Ingo Molnar
2008-09-05 16:56 ` Yinghai Lu
2008-09-08 10:50 ` Jan Beulich [this message]
2008-09-08 13:40 ` Ingo Molnar
2008-09-08 18:54 ` Ingo Molnar
2008-09-09 7:22 ` Jan Beulich
2008-09-09 7:31 ` Ingo Molnar
2008-09-09 7:36 ` Jan Beulich
2008-09-09 7:43 ` [PATCH] x86: x86_{phys,virt}_bits field also for i386 (v3) Jan Beulich
2008-09-09 7:47 ` Ingo Molnar
2008-09-09 7:58 ` Ingo Molnar
2008-09-09 8:15 ` Jan Beulich
2008-09-08 14:53 ` [PATCH] x86: x86_{phys,virt}_bits field also for i386 (v2) Yinghai Lu
2008-09-08 15:30 ` Jan Beulich
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=48C51F8D.76E4.0078.0@novell.com \
--to=jbeulich@novell.com \
--cc=hpa@zytor.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@elte.hu \
--cc=tglx@linutronix.de \
--cc=yhlu.kernel@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.