diff for duplicates of <48C62D1E.7020906@renesas.com> diff --git a/a/1.txt b/N1/1.txt index 06d3aec..4e92abe 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -142,7 +142,7 @@ index 0000000..326363c + struct sh_flctl *flctl = mtd_to_flctl(mtd); + u32 addr = 0; + -+ if (column == -1) { ++ if (column = -1) { + addr = page_addr; /* ERASE1 */ + } else if (page_addr != -1) { + /* SEQIN, READ0, etc.. */ @@ -151,7 +151,7 @@ index 0000000..326363c + addr |= (page_addr & 0xff) << 16; + addr |= ((page_addr >> 8) & 0xff) << 24; + /* big than 128MB */ -+ if (flctl->rw_ADRCNT == ADRCNT2_E) { ++ if (flctl->rw_ADRCNT = ADRCNT2_E) { + u32 addr2; + addr2 = (page_addr >> 16) & 0xff; + writel(addr2, FLADR2(flctl)); @@ -638,7 +638,7 @@ index 0000000..326363c + } + if (flctl->hwecc) { + /* write page with hwecc */ -+ if (flctl->seqin_column == mtd->writesize) ++ if (flctl->seqin_column = mtd->writesize) + execmd_write_oob(mtd); + else if (!flctl->seqin_column) + execmd_write_page_sector(mtd); @@ -754,7 +754,7 @@ index 0000000..326363c + struct sh_flctl *flctl = mtd_to_flctl(mtd); + struct nand_chip *chip = &flctl->chip; + -+ if (mtd->writesize == 512) { ++ if (mtd->writesize = 512) { + flctl->page_size = 0; + if (chip->chipsize > (32 << 20)) { + /* big than 32MB */ @@ -785,7 +785,7 @@ index 0000000..326363c + } + + if (flctl->hwecc) { -+ if (mtd->writesize == 512) { ++ if (mtd->writesize = 512) { + chip->ecc.layout = &flctl_4secc_oob_16; + chip->badblock_pattern = &flctl_4secc_smallpage; + } else { @@ -819,7 +819,7 @@ index 0000000..326363c + int ret; + + pdata = pdev->dev.platform_data; -+ if (pdata == NULL) { ++ if (pdata = NULL) { + printk(KERN_ERR "sh_flctl platform_data not found.\n"); + return -ENODEV; + } @@ -838,7 +838,7 @@ index 0000000..326363c + } + + flctl->reg = ioremap(res->start, res->end - res->start); -+ if (flctl->reg == NULL) { ++ if (flctl->reg = NULL) { + printk(KERN_ERR "%s: ioremap error.\n", __func__); + ret = -ENOMEM; + goto err; @@ -981,7 +981,7 @@ index 0000000..d0ec3e3 +#define _4ECCCNTEN (0x1 << 24) +#define _4ECCEN (0x1 << 23) +#define _4ECCCORRECT (0x1 << 22) -+#define SNAND_E (0x1 << 18) /* SNAND (0=512 1=2048)*/ ++#define SNAND_E (0x1 << 18) /* SNAND (0Q2 1 48)*/ +#define QTSEL_E (0x1 << 17) +#define ENDIAN (0x1 << 16) /* 1 = little endian */ +#define FCKSEL_E (0x1 << 15) diff --git a/a/content_digest b/N1/content_digest index 4fc11b2..33f8fbc 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,6 +1,6 @@ "From\0Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>\0" "Subject\0[PATCH] mtd: sh_flctl: add support for Renesas SuperH FLCTL\0" - "Date\0Tue, 09 Sep 2008 17:00:30 +0900\0" + "Date\0Tue, 09 Sep 2008 08:00:30 +0000\0" "To\0dwmw2@infradead.org\0" "Cc\0linux-mtd@lists.infradead.org" " linux-sh@vger.kernel.org\0" @@ -150,7 +150,7 @@ "+\tstruct sh_flctl *flctl = mtd_to_flctl(mtd);\n" "+\tu32 addr = 0;\n" "+\n" - "+\tif (column == -1) {\n" + "+\tif (column = -1) {\n" "+\t\taddr = page_addr;\t/* ERASE1 */\n" "+\t} else if (page_addr != -1) {\n" "+\t\t/* SEQIN, READ0, etc.. */\n" @@ -159,7 +159,7 @@ "+\t\t\taddr |= (page_addr & 0xff) << 16;\n" "+\t\t\taddr |= ((page_addr >> 8) & 0xff) << 24;\n" "+\t\t\t/* big than 128MB */\n" - "+\t\t\tif (flctl->rw_ADRCNT == ADRCNT2_E) {\n" + "+\t\t\tif (flctl->rw_ADRCNT = ADRCNT2_E) {\n" "+\t\t\t\tu32 \taddr2;\n" "+\t\t\t\taddr2 = (page_addr >> 16) & 0xff;\n" "+\t\t\t\twritel(addr2, FLADR2(flctl));\n" @@ -646,7 +646,7 @@ "+\t\t}\n" "+\t\tif (flctl->hwecc) {\n" "+\t\t\t/* write page with hwecc */\n" - "+\t\t\tif (flctl->seqin_column == mtd->writesize)\n" + "+\t\t\tif (flctl->seqin_column = mtd->writesize)\n" "+\t\t\t\texecmd_write_oob(mtd);\n" "+\t\t\telse if (!flctl->seqin_column)\n" "+\t\t\t\texecmd_write_page_sector(mtd);\n" @@ -762,7 +762,7 @@ "+\tstruct sh_flctl *flctl = mtd_to_flctl(mtd);\n" "+\tstruct nand_chip *chip = &flctl->chip;\n" "+\n" - "+\tif (mtd->writesize == 512) {\n" + "+\tif (mtd->writesize = 512) {\n" "+\t\tflctl->page_size = 0;\n" "+\t\tif (chip->chipsize > (32 << 20)) {\n" "+\t\t\t/* big than 32MB */\n" @@ -793,7 +793,7 @@ "+\t}\n" "+\n" "+\tif (flctl->hwecc) {\n" - "+\t\tif (mtd->writesize == 512) {\n" + "+\t\tif (mtd->writesize = 512) {\n" "+\t\t\tchip->ecc.layout = &flctl_4secc_oob_16;\n" "+\t\t\tchip->badblock_pattern = &flctl_4secc_smallpage;\n" "+\t\t} else {\n" @@ -827,7 +827,7 @@ "+\tint ret;\n" "+\n" "+\tpdata = pdev->dev.platform_data;\n" - "+\tif (pdata == NULL) {\n" + "+\tif (pdata = NULL) {\n" "+\t\tprintk(KERN_ERR \"sh_flctl platform_data not found.\\n\");\n" "+\t\treturn -ENODEV;\n" "+\t}\n" @@ -846,7 +846,7 @@ "+\t}\n" "+\n" "+\tflctl->reg = ioremap(res->start, res->end - res->start);\n" - "+\tif (flctl->reg == NULL) {\n" + "+\tif (flctl->reg = NULL) {\n" "+\t\tprintk(KERN_ERR \"%s: ioremap error.\\n\", __func__);\n" "+\t\tret = -ENOMEM;\n" "+\t\tgoto err;\n" @@ -989,7 +989,7 @@ "+#define _4ECCCNTEN\t(0x1 << 24)\n" "+#define _4ECCEN\t\t(0x1 << 23)\n" "+#define _4ECCCORRECT\t(0x1 << 22)\n" - "+#define SNAND_E\t\t(0x1 << 18)\t/* SNAND (0=512 1=2048)*/\n" + "+#define SNAND_E\t\t(0x1 << 18)\t/* SNAND (0Q2 1 48)*/\n" "+#define QTSEL_E\t\t(0x1 << 17)\n" "+#define ENDIAN\t\t(0x1 << 16)\t/* 1 = little endian */\n" "+#define FCKSEL_E\t(0x1 << 15)\n" @@ -1064,4 +1064,4 @@ "-- \n" 1.5.5 -0a5c705fb2735dfa59f135d7e07d1ef2950a677c752418096b2ff556e1b17325 +d7254c7f7fc3ec1d5b2306ae703b2d28451b04afa332700b64741d632a74d622
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