From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: Re: [PATCH, RFC] x86: make the GDT per-CPU Date: Thu, 11 Sep 2008 13:42:49 +0100 Message-ID: <48C92E69.76E4.0078.0@novell.com> References: <48C7F75C.76E4.0078.0@novell.com> <48C92AF7.76E4.0078.0@novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: <48C92AF7.76E4.0078.0@novell.com> Content-Disposition: inline List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Keir Fraser Cc: xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org >>> "Jan Beulich" 11.09.08 14:28 >>> >>> Keir Fraser 11.09.08 12:54 >>> >>Firstly, we don't really need the LDT and TSS GST slots to be always = valid. >>Actually we always initialise the slot immediately before LTR or LLDT. = So we >>could even have per-CPU LDT and TSS initialisation share a single slot. >>Then, with the extra reserved page, we'd be good for nearly 512 CPUs. > >No, this would break 32-bits at least: The GDT entry for the selector >loaded into TR must remain a valid, busy TSS descriptor for the whole >lifetime of the system. So it can't be shared with the LDT. But even for >64-bits I would fear using the same GDT slot for both LDT and GDT >loading. Actually, there's a second aspect here, too (again for 32-bits): As a follow-up patch I'm planning to make the double fault TSS per-CPU, too. This wasn't as simple with the global GDT as it would be with the per-CPU one. Jan