From: Elad Lahav <elahav@uwaterloo.ca>
To: sparclinux@vger.kernel.org
Subject: Re: Processor IDs on the Niagara
Date: Sat, 13 Sep 2008 01:27:20 +0000 [thread overview]
Message-ID: <48CB16F8.6020600@uwaterloo.ca> (raw)
In-Reply-To: <48CADADA.7050604@uwaterloo.ca>
> But on Niagara-T2 there are two integer units available amongst
> the 8 per-core virtual cpus.
>
> And _that_ is what these values are meant to represent.
>
> For example, on Niagara-T2:
>
> core_id proc_id
> cpu0: 1 0
> cpu1: 1 0
> cpu2: 1 0
> cpu3: 1 0
> cpu4: 1 1
> cpu5: 1 1
> cpu6: 1 1
> cpu7: 1 1
But what happens on the T2+? How is a physical package represented?
Clearly the scheduler needs to be aware of the fact that two hardware
threads are on different physical processors. As far as I know, the
scheduler supports 4 levels: threads, cores, physical processors and
NUMA nodes. I don't see how the current scheme falls into these categories.
Elad
next prev parent reply other threads:[~2008-09-13 1:27 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-09-12 21:10 Processor IDs on the Niagara Elad Lahav
2008-09-12 21:44 ` David Miller
2008-09-13 0:47 ` Elad Lahav
2008-09-13 0:53 ` Elad Lahav
2008-09-13 1:01 ` David Miller
2008-09-13 1:02 ` David Miller
2008-09-13 1:18 ` David Miller
2008-09-13 1:27 ` Elad Lahav [this message]
2008-09-13 1:38 ` David Miller
2008-09-15 21:26 ` Elad Lahav
2008-09-15 22:09 ` David Miller
2008-09-16 18:47 ` Elad Lahav
2008-09-16 18:48 ` David Miller
2008-09-17 18:45 ` Elad Lahav
2008-10-05 20:47 ` David Miller
2008-10-05 20:57 ` David Miller
2008-10-06 13:15 ` Elad Lahav
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