From: "Hervé Poussineau" <hpoussin@reactos.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH] Fix CP0 LLAddr register
Date: Mon, 06 Oct 2008 22:51:39 +0200 [thread overview]
Message-ID: <48EA7A5B.8090208@reactos.org> (raw)
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Hi,
On MIPS R4000 CPU, LLAddr register is read-write, whereas on MIPS64
specification, it is read-only.
Attached patch adds a new instruction flag (INSN_R4000), which is
checked to know if register is writable.
Also, it changes the return format of the LLAddr register, which is
defined as implementation-dependant in MIPS64, so it shouldn't hurt.
Hervé
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reply other threads:[~2008-10-06 20:51 UTC|newest]
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