From: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Subject: [PATCH] MIPS: Report all watch register masks in /proc/cpuinfo (version 2).
Date: Fri, 10 Oct 2008 10:58:33 -0700 [thread overview]
Message-ID: <48EF97C9.7080101@caviumnetworks.com> (raw)
Report all watch register masks in /proc/cpuinfo.
This version actually passes checkpatch.pl!
Some CPUs have heterogeneous watch register properties. Let's show
them all.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
arch/mips/kernel/proc.c | 14 +++++++++-----
1 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 0dda76c..87cab9f 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -23,6 +23,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
unsigned int fp_vers;
unsigned long n = (unsigned long) v - 1;
char fmt [64];
+ int i;
preempt_disable();
version = current_cpu_data.processor_id;
@@ -59,11 +60,14 @@ static int show_cpuinfo(struct seq_file *m, void *v)
cpu_has_divec ? "yes" : "no");
seq_printf(m, "hardware watchpoint\t: %s",
cpu_has_watch ? "yes, " : "no\n");
- if (cpu_has_watch)
- seq_printf(m,
- "count: %d, address/irw mask: 0x%04x\n",
- cpu_data[n].watch_reg_count,
- cpu_data[n].watch_reg_masks[0]);
+ if (cpu_has_watch) {
+ seq_printf(m, "count: %d, address/irw mask: [",
+ cpu_data[n].watch_reg_count);
+ for (i = 0; i < cpu_data[n].watch_reg_count; i++)
+ seq_printf(m, "%s0x%04x", i ? ", " : "" ,
+ cpu_data[n].watch_reg_masks[i]);
+ seq_printf(m, "]\n");
+ }
seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
cpu_has_mips16 ? " mips16" : "",
cpu_has_mdmx ? " mdmx" : "",
next reply other threads:[~2008-10-10 17:58 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-10-10 17:58 David Daney [this message]
2008-10-11 15:19 ` [PATCH] MIPS: Report all watch register masks in /proc/cpuinfo (version 2) Ralf Baechle
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