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From: Stefan Weil <weil@mail.berlios.de>
To: Aurelien Jarno <aurelien@aurel32.net>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH] Add support for CPU_LOG_INT (MIPS targets)
Date: Tue, 14 Oct 2008 19:25:30 +0200	[thread overview]
Message-ID: <48F4D60A.9050309@mail.berlios.de> (raw)
In-Reply-To: <20081014095802.GB13141@volta.aurel32.net>

Aurelien Jarno schrieb:
> On Thu, Oct 02, 2008 at 10:04:26PM +0200, Stefan Weil wrote:
>   
> ...
>> Add interrupt logging for MIPS targets.
>>
>> Signed-off-by: Stefan Weil <weil@mail.berlios.de> 
>>
>> Index: hw/mips_int.c
>> ===================================================================
>> --- hw/mips_int.c	(Revision 5400)
>> +++ hw/mips_int.c	(Arbeitskopie)
>> @@ -1,6 +1,7 @@
>>  #include "hw.h"
>>  #include "mips.h"
>>  #include "cpu.h"
>> +#include "qemu-log.h"
>>  
>>  /* Raise IRQ to CPU if necessary. It must be called every time the active
>>     IRQ may change */
>> @@ -12,10 +13,28 @@
>>          !(env->hflags & MIPS_HFLAG_DM)) {
>>          if ((env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask) &&
>>              !(env->interrupt_request & CPU_INTERRUPT_HARD)) {
>> +            if (loglevel & CPU_LOG_INT) {
>> +                fprintf(logfile, "%s: cpu_interrupt (0x%08x,0x%08x)\n", __func__,
>> +                  env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask,
>> +                  env->interrupt_request);
>> +                cpu_dump_state(env, logfile, fprintf, 0);
>> +            }
>>              cpu_interrupt(env, CPU_INTERRUPT_HARD);
>> -	}
>> -    } else
>> +        } else {
>> +            if (loglevel & CPU_LOG_INT) {
>> +                fprintf(logfile, "%s: no interrupt (0x%08x,0x%08x)\n", __func__,
>> +                  env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask,
>> +                  env->interrupt_request);
>> +                cpu_dump_state(env, logfile, fprintf, 0);
>> +            }
>>     
>
> I am not sure we really want to log this case, as no interrupt are
> actually triggered (disabled interrupt, already processing an
> interrupt, etc.)
>   
Well, I added this code to debug a real problem, not just for fun.
It helps to see who triggers this code, even when interrupts are
disabled at that moment.

>> +        }
>> +    } else {
>> +        if (loglevel & CPU_LOG_INT) {
>> +            fprintf(logfile, "%s: cpu_reset_interrupt\n", __func__);
>> +            cpu_dump_state(env, logfile, fprintf, 0);
>> +        }
>>          cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
>> +    }
>>  }
>>  
>>  static void cpu_mips_irq_request(void *opaque, int irq, int level)
>>     
>
> Otherwise looks ok.
>
>   
Thanks,
Stefan

  reply	other threads:[~2008-10-14 17:25 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-10-02 20:04 [Qemu-devel] [PATCH] Add support for CPU_LOG_INT (MIPS targets) Stefan Weil
2008-10-14  9:58 ` Aurelien Jarno
2008-10-14 17:25   ` Stefan Weil [this message]
2008-10-14 19:54     ` Aurelien Jarno

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