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From: Wolfgang Grandegger <wg@grandegger.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/2][for v2008.10] 85xx: Using proper I2C source clock divider for MPC8544
Date: Fri, 17 Oct 2008 11:55:16 +0200	[thread overview]
Message-ID: <48F86104.2050304@grandegger.com> (raw)
In-Reply-To: <1224212330-14491-2-git-send-email-galak@kernel.crashing.org>

Hi Kumar,

Kumar Gala wrote:
> The MPC8544 RM incorrect shows the SEC_CFG bit in PORDEVSR2 as being
> bit 26, instead it should be bit 28.  This caused in incorrect
> interpretation of the i2c_clk which is the same as the SEC clk on
> MPC8544.  The SEC clk is controlled by cfg_sec_freq that is reported
> in PORDEVSR2.
> 
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

That makes sense now. I just got the confirmation from the customer,
that LWE_B[0] is indeed pulled down via FPGA:

  LWE_B[0]      Pulldown       SEC Frequency Ratio 2:1

Thanks for your investigations.

Wolfgang.

  parent reply	other threads:[~2008-10-17  9:55 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-10-17  2:58 [U-Boot] [PATCH 1/2][for v2008.10] Revert "85xx: Using proper I2C source clock divider for MPC8544" Kumar Gala
2008-10-17  2:58 ` [U-Boot] [PATCH 2/2][for v2008.10] 85xx: Using proper I2C source clock divider for MPC8544 Kumar Gala
2008-10-17  8:52   ` Wolfgang Denk
2008-10-17  9:55   ` Wolfgang Grandegger [this message]
2008-10-17 18:54   ` Timur Tabi
2008-10-17 20:35     ` Kumar Gala
2008-10-17 20:39       ` Timur Tabi
2008-10-20 13:02         ` Jerry Van Baren
2008-10-20 19:22           ` Wolfgang Denk
2008-10-20 20:06             ` Kumar Gala
2008-10-17  8:51 ` [U-Boot] [PATCH 1/2][for v2008.10] Revert "85xx: Using proper I2C source clock divider for MPC8544" Wolfgang Denk

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