From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jan Kiszka Subject: Re: [PATCH] KVM: x86: Don't deliver PIC interrupts to disabled APICs Date: Mon, 20 Oct 2008 14:02:35 +0200 Message-ID: <48FC735B.8050002@siemens.com> References: <48FC4671.90409@siemens.com> <20081020115117.GB30536@yukikaze> <48FC71ED.6060505@siemens.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: kvm-devel , Avi Kivity To: "Yang, Sheng" Return-path: Received: from lizzard.sbs.de ([194.138.37.39]:16046 "EHLO lizzard.sbs.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751617AbYJTMCw (ORCPT ); Mon, 20 Oct 2008 08:02:52 -0400 In-Reply-To: <48FC71ED.6060505@siemens.com> Sender: kvm-owner@vger.kernel.org List-ID: Jan Kiszka wrote: > Sheng Yang wrote: >> On Mon, Oct 20, 2008 at 10:50:57AM +0200, Jan Kiszka wrote: >>> The locic of kvm_apic_accept_pic_intr has a minor, practically hardly >> Typo... >> >>> relevant incorrectness: PIC interrupts are still delivered even if the >>> APIC of VPU0 (BSP) is disabled. This does not comply with the Virtual >>> Wire mode according to the Intel MP spec. >>> >>> To avoid side effects, the BSP APIC is now enabled on reset. >>> >>> Signed-off-by: Jan Kiszka >>> --- >>> arch/x86/kvm/lapic.c | 19 +++++++++---------- >>> 1 file changed, 9 insertions(+), 10 deletions(-) >>> >>> Index: b/arch/x86/kvm/lapic.c >>> =================================================================== >>> --- a/arch/x86/kvm/lapic.c >>> +++ b/arch/x86/kvm/lapic.c >>> @@ -933,7 +933,8 @@ void kvm_lapic_reset(struct kvm_vcpu *vc >>> update_divide_count(apic); >>> atomic_set(&apic->timer.pending, 0); >>> if (vcpu->vcpu_id == 0) >>> - vcpu->arch.apic_base |= MSR_IA32_APICBASE_BSP; >>> + vcpu->arch.apic_base |= >>> + MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE; >> I think this have already been done in vmx_vcpu_reset()/svm_create_vcpu()? > > Indeed, will drop that hunk. > >>> apic_update_ppr(apic); >>> >>> apic_debug(KERN_INFO "%s: vcpu=%p, id=%d, base_msr=" >>> @@ -1089,17 +1090,15 @@ int kvm_apic_has_interrupt(struct kvm_vc >>> >>> int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu) >>> { >>> + struct kvm_lapic *apic = vcpu->arch.apic; >>> u32 lvt0 = apic_get_reg(vcpu->arch.apic, APIC_LVT0); >> Reuse just defined variable "apic"? > > [ Cleaning my glasses ] Ahh, I see. :) > >>> - int r = 0; >>> >>> - if (vcpu->vcpu_id == 0) { >>> - if (!apic_hw_enabled(vcpu->arch.apic)) >>> - r = 1; >>> - if ((lvt0 & APIC_LVT_MASKED) == 0 && >>> - GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT) >>> - r = 1; >>> - } >>> - return r; >>> + /* Virtual Wire mode, but we only deliver to the BSP. */ >>> + if (vcpu->vcpu_id == 0 && apic_hw_enabled(apic) >> Good point! How about apic_enabled(apic)? Software disable apic should also >> can't functional(hope this wouldn't expose some bugs...) > > apic_sw_enable is also covered by the LVT_MASKED check we do on delivery > anyway. That's why I lest it out here. Can spend a comment, though. Correction: LVT_MASKED is already checked here, one line below. > >> -- >> regards >> Yang, Sheng >> >>> + && !(lvt0 & APIC_LVT_MASKED) >>> + && GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT) >>> + return 1; >>> + return 0; >>> } >>> >>> void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu) Jan -- Siemens AG, Corporate Technology, CT SE 2 Corporate Competence Center Embedded Linux