From: Jeff Garzik <jeff@garzik.org>
To: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Cc: netdev@vger.kernel.org, davem@davemloft.net,
Alexander Duyck <alexander.h.duyck@intel.com>
Subject: Re: [PATCH] igb: fix tx data corruption with transition to L0s on 82575
Date: Tue, 21 Oct 2008 02:11:13 -0400 [thread overview]
Message-ID: <48FD7281.6030601@garzik.org> (raw)
In-Reply-To: <20081017042657.7080.17171.stgit@gitlost.lost>
Jeff Kirsher wrote:
> From: Alexander Duyck <alexander.h.duyck@intel.com>
>
> The 82575 has an issue in which the DMA will go out of sync if the link
> partner goes into an L0s state. To prevent this we set the pci-e link
> partner capability bits to disable the L0s transition on the hw.
>
> Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
> ---
>
> drivers/net/igb/igb_main.c | 27 +++++++++++++++++++++++++--
> 1 files changed, 25 insertions(+), 2 deletions(-)
applied
prev parent reply other threads:[~2008-10-21 6:11 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-10-17 4:26 [PATCH] igb: fix tx data corruption with transition to L0s on 82575 Jeff Kirsher
2008-10-21 6:11 ` Jeff Garzik [this message]
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