From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Keith Busch <kbusch@kernel.org>
Cc: Manivannan Sadhasivam <mani@kernel.org>,
Keith Busch <kbusch@meta.com>,
bhelgaas@google.com, linux-pci@vger.kernel.org,
Lukas Wunner <lukas@wunner.de>
Subject: Re: [PATCHv2] pci: allow user specifiy a reset poll timeout
Date: Thu, 12 Jun 2025 11:06:41 +0300 (EEST) [thread overview]
Message-ID: <48d598a4-27e4-e1d4-a6a2-9dc1fec10b77@linux.intel.com> (raw)
In-Reply-To: <aEm6Nx6bSDvyouEy@kbusch-mbp>
On Wed, 11 Jun 2025, Keith Busch wrote:
> On Wed, Jun 11, 2025 at 10:41:33PM +0530, Manivannan Sadhasivam wrote:
> > On Wed, Jun 11, 2025 at 10:40:10AM -0600, Keith Busch wrote:
> > >
> > > No. I'm dealing with new devices being actively developed, with new ones
> > > coming out every year, so a quirk list would just be never ending
> > > maintenance pain point.
> >
> > Sounds like you have a lot of devices behaving this way. So can't you quirk them
> > based on VID and CLASS?
>
> What I mean by active development is that the timeout continues to be a
> moving target. A quirk only gives me a fixed value, but I need a
> modifiable one without having to recompile the kernel.
Hi,
Doesn't DRS/FRS address this such way that the device can tell when it's
ready? So perhaps check if DRS/FRS is supported and only then make the
timeout like really large?
--
i.
next prev parent reply other threads:[~2025-06-12 8:06 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-18 16:54 [PATCHv2] pci: allow user specifiy a reset poll timeout Keith Busch
2025-04-15 0:11 ` Keith Busch
2025-06-11 16:28 ` Manivannan Sadhasivam
2025-06-11 16:40 ` Keith Busch
2025-06-11 17:11 ` Manivannan Sadhasivam
2025-06-11 17:17 ` Keith Busch
2025-06-12 8:06 ` Ilpo Järvinen [this message]
2025-06-23 17:51 ` Keith Busch
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