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Message-ID: <4908B717.3010603@caviumnetworks.com>
Date:	Wed, 29 Oct 2008 12:18:47 -0700
From:	David Daney <ddaney@caviumnetworks.com>
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To:	Christoph Hellwig <hch@lst.de>
CC:	linux-mips@linux-mips.org,
	Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Subject: Re: [PATCH 06/36] Add Cavium OCTEON processor CSR definitions
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Christoph Hellwig wrote:
> On Mon, Oct 27, 2008 at 05:02:38PM -0700, David Daney wrote:
>> Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
>> Signed-off-by: David Daney <ddaney@caviumnetworks.com>
>> ---
>>  .../cavium-octeon/executive/cvmx-csr-addresses.h   | 8391 ++++++
>>  arch/mips/cavium-octeon/executive/cvmx-csr-enums.h |   86 +
>>  .../cavium-octeon/executive/cvmx-csr-typedefs.h    |27517 ++++++++++++++++++++
> 
> 27517 lines in a header and it's all junk?  
> 

I'm glad you asked.  No it is not all junk.

That file contains the bit definitions for all on-chip registers.

We are interested in transforming this information into a form suitable 
for inclusion in the kernel.  Any specific suggestions as to improve the 
patch will be considered.

Several possibilities are:

1) Don't typedef all the unions in  cvmx-csr-typedefs.h.  An rename the 
file so it doesn't contain the reprehensible word 'typedef'

2) Break cvmx-csr-addresses.h and cvmx-csr-typedefs.h into several 
parts, one for each functional block in the processor.

There are obviously other options as well...

Thanks,
David Daney