From: Kevin Hilman <khilman@deeprootsystems.com>
To: Paul Walmsley <paul@pwsan.com>
Cc: linux-omap@vger.kernel.org, tomi.valkeinen@nokia.com,
rick@efn.org, timo.t.kokkonen@nokia.com, sakari.poussa@nokia.com
Subject: Re: [PATCH] OMAP3 clock: fix non-CORE DPLL rate assignment bugs
Date: Wed, 05 Nov 2008 15:43:43 -0800 [thread overview]
Message-ID: <49122FAF.1020109@deeprootsystems.com> (raw)
In-Reply-To: <49075870.9020804@deeprootsystems.com>
Kevin Hilman wrote:
> Paul Walmsley wrote:
>> Commit 8b1f0bd44fe490ec631230c8c040753a2bda8caa introduced a bug that
>> caused non-CORE DPLL rates to be incorrectly set on boot in
>> omap3_noncore_dpll_enable(). Debugged by Tomi Valkeinen
>> <tomi.valkeinen@nokia.com> - thanks Tomi.
>>
>> Also fix omap3_noncore_dpll_set_rate() to assign clk->rate after a
>> DPLL reprogram.
>>
>> Tested on 3430SDP.
>
> FYI, This patch breaks the ability to come out of retention in dynamic
> idle, but I haven't yet discovered why.
>
It appears this is related to the UART patches being used in the PM
branch, and not this patch.
I have a (forthcoming) set of UART updates that will allow the UART to
disable its clocks and enable the chip to hit retention.
Kevin
prev parent reply other threads:[~2008-11-05 23:43 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-10-17 22:18 [PATCH] OMAP3 clock: fix non-CORE DPLL rate assignment bugs Paul Walmsley
2008-10-17 22:46 ` Tony Lindgren
2008-10-28 18:22 ` Kevin Hilman
2008-10-29 14:24 ` Paul Walmsley
2008-10-29 16:35 ` Kevin Hilman
2008-10-29 16:47 ` Paul Walmsley
2008-11-05 23:43 ` Kevin Hilman [this message]
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