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From: "Jan Beulich" <jbeulich@novell.com>
To: Dexuan Cui <dexuan.cui@intel.com>
Cc: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>,
	'Keir Fraser' <keir.fraser@eu.citrix.com>
Subject: Re: [PATCH] Add XSAVE/XRSTOR support to Xen
Date: Wed, 26 Nov 2008 11:22:34 +0000	[thread overview]
Message-ID: <492D3F8A.76E4.0078.0@novell.com> (raw)
In-Reply-To: <EADF0A36011179459010BDF5142A457502271006@pdsmsx502.ccr.corp.intel.com>

>>> "Cui, Dexuan" <dexuan.cui@intel.com> 26.11.08 10:43 >>>
>The attached patch adds the support of XSAVE/XRSTOR infrastructure for x86.
>XSAVE/XRSTOR manages the existing and future processor extended states on x86 architecture.
>
>XSAVE/XRSTOR related stuff is defined in Intel SDMs (The latest version is Nov. 2008):
>http://www.intel.com/products/processor/manuals/ 
>
>The patch uses the classical CR0.TS based lazy algorithm.
>For now only FPU/SSE states (The bit 0 and 1 of XCR0) is supported.
>
>Signed-off-by: Dexuan Cui <dexuan.cui@intel.com>

I have to admit that I can't see how save/restore is being taken care of.
After all, the extra state logically would require vcpu_guest_context to
be extended, but as that's not possible, an alternative solution must be
provided.

Jan

  parent reply	other threads:[~2008-11-26 11:22 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-11-26  9:43 [PATCH] Add XSAVE/XRSTOR support to Xen Cui, Dexuan
2008-11-26 10:25 ` Keir Fraser
2008-11-26 11:22 ` Jan Beulich [this message]
  -- strict thread matches above, loose matches on Subject: below --
2009-04-04  0:22 [PATCH] Add xsave/xrstor " yuhong
2008-05-28 12:02 Cui, Dexuan
2008-05-28 12:06 ` Cui, Dexuan
2008-05-28 12:42   ` Keir Fraser
2008-05-28 13:11     ` Cui, Dexuan
2008-05-28 13:37       ` Keir Fraser

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