From mboxrd@z Thu Jan 1 00:00:00 1970 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----_=_NextPart_001_01C94BF0.0709D8AA" Date: Fri, 21 Nov 2008 16:44:23 +0100 Message-ID: From: "Rubio, Martial" Subject: [Xenomai-help] External PCIe device: MSI interrupt install hangs up the CPU List-Id: Help regarding installation and common use of Xenomai List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: xenomai@xenomai.org Cc: jeanfrancois.gilot@domain.hid, "Dupeyrou, Gilles" This is a multi-part message in MIME format. ------_=_NextPart_001_01C94BF0.0709D8AA Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hello everybody =20 I'm working with following config :=20 =20 CPU (0=3D>3) AMD Dual Core AMD Opteron=20 Linux version 2.6.25-pae Xenomai : hal / i386 Xenomai : real time nucleus v2.4.5 =20 Here's below the state of /proc/interrupts : =20 in red fonts the range of PCIe(xpress)-MSI vectors : =20 hurle-bise [anaisvs](34):more /proc/interrupts CPU0 CPU1 CPU2 CPU3 0: 146 0 0 0 XT-PIC-XT timer 1: 1039 0 0 0 XT-PIC-XT i8042 2: 0 0 0 0 XT-PIC-XT cascade 4: 5 0 0 0 XT-PIC-XT 5: 2 0 0 0 XT-PIC-XT ehci_hcd:usb2 6: 5 0 0 0 XT-PIC-XT floppy 7: 16300 0 0 0 XT-PIC-XT ohci_hcd:usb1 10: 155104 0 0 0 XT-PIC-XT ioc0, sata_nv, sata_nv, ohci1394 11: 47305 0 0 0 XT-PIC-XT sata_nv, HDA Intel 14: 0 0 0 0 XT-PIC-XT pata_amd 15: 0 0 0 0 XT-PIC-XT pata_amd 212: 0 9 487 1942504 PCI-MSI-edge eth0 213: 0 0 0 0 PCI-MSI-edge shpchp NMI: 0 0 0 0 Non-maskable interrupts LOC: 3722798 3722767 3722730 3722768 Local timer interrupts RES: 39386 37672 23570 25780 Rescheduling interrupts CAL: 1112 1273 1280 250 function call interrupts TLB: 6144 8510 6271 9025 TLB shootdowns TRM: 0 0 0 0 Thermal event interrupts SPU: 0 0 0 0 Spurious interrupts ERR: 1 MIS: 0 =20 I try to install a new MSI interrupt via rtdm package (rtdm_irq_request) with a vector number (211) given by the call to pci_msi_enable for the new PCIe device. =20 The system hangs up immediatly (sometimes I can catch the stack trace with dmesg the last reference seems to be in rt_hal package) =20 If I replace (for debug only!!!) this vector number by an unused "classical" vector number (for instance 14 or 15) ... no problem. =20 Have you allready test this kind of configuration ... if so a little help from your part would be greatly appreciated! =20 Kind regards =20 Martial Rubio =20 Eurocopter France - ETZSR Technical software manager =20 * : > ( 04 42 85 68 11=20 7 04 42 85 88 35 =20 ------_=_NextPart_001_01C94BF0.0709D8AA Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Hello=20 everybody

I'm=20 working with following config :

CPU (0=3D>3)=20 AMD Dual Core AMD Opteron

Linux version=20 2.6.25-pae

Xenomai : hal=20 / i386

Xenomai : real=20 time nucleus v2.4.5

Here's below=20 the state of /proc/interrupts :

in red fonts=20 the range of PCIe(xpress)-MSI vectors :

hurle-bise=20 [anaisvs](34):more=20 /proc/interrupts
         = ; =20 CPU0      =20 CPU1      =20 CPU2       CPU3
=20 0:       =20 146         =20 0         =20 0          = 0   =20 XT-PIC-XT        timer
=20 1:      =20 1039         =20 0         =20 0          = 0   =20 XT-PIC-XT        i8042
=20 2:         =20 0         =20 0         =20 0          = 0   =20 XT-PIC-XT        cascade
=20 4:         =20 5         =20 0         =20 0          = 0   =20 XT-PIC-XT
= 5:         =20 2         =20 0         =20 0          = 0   =20 XT-PIC-XT        = ehci_hcd:usb2
=20 6:         =20 5         =20 0         =20 0          = 0   =20 XT-PIC-XT        floppy
=20 7:     =20 16300         =20 0         =20 0          = 0   =20 XT-PIC-XT       =20 ohci_hcd:usb1
10:    =20 155104         =20 0         =20 0          = 0   =20 XT-PIC-XT        ioc0, sata_nv, = sata_nv,=20 ohci1394
11:     =20 47305         =20 0         =20 0          = 0   =20 XT-PIC-XT        sata_nv, HDA=20 Intel
14:          = 0         =20 0         =20 0          = 0   =20 XT-PIC-XT       =20 pata_amd
15:        &nbs= p;=20 0         =20 0         =20 0          = 0   =20 XT-PIC-XT        pata_amd
212:         = ;=20 0         =20 9        487   =20 1942504   PCI-MSI-edge     =20 eth0
213:         =20 0         =20 0         =20 0          0  =20 PCI-MSI-edge     =20 shpchp
NMI:        &nbs= p;=20 0         =20 0         =20 0          0  =20 Non-maskable interrupts
LOC:    = 3722798   =20 3722767    3722730    3722768   = Local=20 timer interrupts
RES:     =20 39386      37672     =20 23570      25780   Rescheduling=20 interrupts
CAL:      =20 1112      =20 1273      =20 1280        250   function = call=20 interrupts
TLB:      =20 6144      =20 8510      =20 6271       9025   TLB=20 shootdowns
TRM:          = 0         =20 0         =20 0          0   = Thermal=20 event = interrupts
SPU:          = 0         =20 0         =20 0          0   = Spurious=20 interrupts
ERR:          = 1
MIS:         =20 0

I try to=20 install a new MSI interrupt via rtdm package (rtdm_irq_request)=20 with

a vector=20 number (211) given by the call to pci_msi_enable for the = new PCIe=20 device.

The system=20 hangs up immediatly (sometimes I can catch the stack trace with=20 dmesg

the last=20 reference seems to be in rt_hal package)

If I replace=20 (for debug only!!!) this vector number by an unused "classical" = vector=20 number (for instance

14 or 15) ...=20 no problem.

Have you=20 allready test this kind of configuration ... if so a little help from = your part=20 would be

greatly=20 appreciated!

Kind=20 regards

Martial Rubio =20

Eurocopter=20 France – ETZSR

Technical=20 software manager

* :=20 <mailto:martial.rubio@domain.hid>

( =20 04 42=20 85 68 11

7 =20 04 42 85 88 = 35

------_=_NextPart_001_01C94BF0.0709D8AA-- From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <4926E5C6.8030502@domain.hid> Date: Fri, 21 Nov 2008 17:45:58 +0100 From: Jan Kiszka MIME-Version: 1.0 References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Xenomai-help] External PCIe device: MSI interrupt install hangs up the CPU List-Id: Help regarding installation and common use of Xenomai List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Rubio, Martial" Cc: jeanfrancois.gilot@domain.hid, xenomai@xenomai.org, "Dupeyrou, Gilles" Rubio, Martial wrote: > Hello everybody > > I'm working with following config : > > CPU (0=>3) AMD Dual Core AMD Opteron > Linux version 2.6.25-pae 2.6.25 comes with the risk of missing relevant fixes that went into .26 and later. Do you have a chance to update? 2.6.27 is a bit fresh, 2.6.26.7 + ipipe-2.0-16 would be a conservative approach right now. > Xenomai : hal / i386 > Xenomai : real time nucleus v2.4.5 > > Here's below the state of /proc/interrupts : > > in red fonts the range of PCIe(xpress)-MSI vectors : Uuh, please don't expect the reader to have HTML rendering on for a typically text-only medium like mail. Yeah, it tends to be the other way around inside companies, I know... > > hurle-bise [anaisvs](34):more /proc/interrupts > CPU0 CPU1 CPU2 CPU3 > 0: 146 0 0 0 XT-PIC-XT > timer > 1: 1039 0 0 0 XT-PIC-XT > i8042 > 2: 0 0 0 0 XT-PIC-XT > cascade > 4: 5 0 0 0 XT-PIC-XT > 5: 2 0 0 0 XT-PIC-XT > ehci_hcd:usb2 > 6: 5 0 0 0 XT-PIC-XT > floppy > 7: 16300 0 0 0 XT-PIC-XT > ohci_hcd:usb1 > 10: 155104 0 0 0 XT-PIC-XT > ioc0, sata_nv, sata_nv, ohci1394 > 11: 47305 0 0 0 XT-PIC-XT > sata_nv, HDA Intel > 14: 0 0 0 0 XT-PIC-XT > pata_amd > 15: 0 0 0 0 XT-PIC-XT > pata_amd > 212: 0 9 487 1942504 PCI-MSI-edge > eth0 > 213: 0 0 0 0 PCI-MSI-edge > shpchp > NMI: 0 0 0 0 Non-maskable > interrupts > LOC: 3722798 3722767 3722730 3722768 Local timer > interrupts > RES: 39386 37672 23570 25780 Rescheduling > interrupts > CAL: 1112 1273 1280 250 function call > interrupts > TLB: 6144 8510 6271 9025 TLB shootdowns > TRM: 0 0 0 0 Thermal event > interrupts > SPU: 0 0 0 0 Spurious interrupts > ERR: 1 > MIS: 0 > > I try to install a new MSI interrupt via rtdm package (rtdm_irq_request) > with > a vector number (211) given by the call to pci_msi_enable for the new > PCIe device. Is that driver prepared to possibly receive an immediate IRQ after registration? Of course, that can only happen if the device's hardware is not explicitly configured to disable IRQ delivery. I'm asking as it is a common mistake to mixup IRQ arming and proper driver state initialization. > > The system hangs up immediatly (sometimes I can catch the stack trace > with dmesg > the last reference seems to be in rt_hal package) You should try to capture a full trace via a serial console e.g., see linux/Documentation/serial-console.txt. > > If I replace (for debug only!!!) this vector number by an unused > "classical" vector number (for instance > 14 or 15) ... no problem. > > Have you allready test this kind of configuration ... if so a little > help from your part would be > greatly appreciated! Another test around MSI: try to disable CONFIG_PCI_MSI and check if something changes. Jan -- Siemens AG, Corporate Technology, CT SE 2 ES-OS Corporate Competence Center Embedded Linux From mboxrd@z Thu Jan 1 00:00:00 1970 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----_=_NextPart_001_01C94E55.6E5D66D6" Date: Mon, 24 Nov 2008 17:55:18 +0100 Message-ID: In-Reply-To: <4926E5C6.8030502@domain.hid> From: "Rubio, Martial" Subject: Re: [Xenomai-help] External PCIe device: MSI interrupt install hangs up the CPU List-Id: Help regarding installation and common use of Xenomai List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: jeanfrancois.gilot@domain.hid, xenomai@xenomai.org, "Dupeyrou, Gilles" This is a multi-part message in MIME format. ------_=_NextPart_001_01C94E55.6E5D66D6 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hello everybody ... Find attached text files which seems to be very useful about my CPU hanging Perharps a problem of detection of an external dev PCIe with only MSI 64-bit access Capability (pci_bus_read_config_dword instead of pci_bus_read_config_word in pci/msi.c) with a machine which has been configured in a 32-bit mode (mandatory in my case) ? What do you think of that? ... And if TRUE what to do (it's a question for J.F) Regards to all Martial -----Original Message----- From: Jan Kiszka [mailto:jan.kiszka@domain.hid Sent: Friday, November 21, 2008 5:46 PM To: Rubio, Martial Cc: xenomai@xenomai.org; jeanfrancois.gilot@domain.hid; Dupeyrou, Gilles Subject: Re: External PCIe device: MSI interrupt install hangs up the CPU Rubio, Martial wrote: > Hello everybody > =20 > I'm working with following config :=20 > =20 > CPU (0=3D>3) AMD Dual Core AMD Opteron > Linux version 2.6.25-pae 2.6.25 comes with the risk of missing relevant fixes that went into .26 and later. Do you have a chance to update? 2.6.27 is a bit fresh, 2.6.26.7 + ipipe-2.0-16 would be a conservative approach right now. > Xenomai : hal / i386 > Xenomai : real time nucleus v2.4.5 > =20 > Here's below the state of /proc/interrupts : > =20 > in red fonts the range of PCIe(xpress)-MSI vectors : Uuh, please don't expect the reader to have HTML rendering on for a typically text-only medium like mail. Yeah, it tends to be the other way around inside companies, I know... > =20 > hurle-bise [anaisvs](34):more /proc/interrupts > CPU0 CPU1 CPU2 CPU3 > 0: 146 0 0 0 XT-PIC-XT > timer > 1: 1039 0 0 0 XT-PIC-XT > i8042 > 2: 0 0 0 0 XT-PIC-XT > cascade > 4: 5 0 0 0 XT-PIC-XT > 5: 2 0 0 0 XT-PIC-XT > ehci_hcd:usb2 > 6: 5 0 0 0 XT-PIC-XT > floppy > 7: 16300 0 0 0 XT-PIC-XT > ohci_hcd:usb1 > 10: 155104 0 0 0 XT-PIC-XT > ioc0, sata_nv, sata_nv, ohci1394 > 11: 47305 0 0 0 XT-PIC-XT > sata_nv, HDA Intel > 14: 0 0 0 0 XT-PIC-XT > pata_amd > 15: 0 0 0 0 XT-PIC-XT > pata_amd > 212: 0 9 487 1942504 PCI-MSI-edge > eth0 > 213: 0 0 0 0 PCI-MSI-edge > shpchp > NMI: 0 0 0 0 Non-maskable > interrupts > LOC: 3722798 3722767 3722730 3722768 Local timer > interrupts > RES: 39386 37672 23570 25780 Rescheduling > interrupts > CAL: 1112 1273 1280 250 function call > interrupts > TLB: 6144 8510 6271 9025 TLB shootdowns > TRM: 0 0 0 0 Thermal event > interrupts > SPU: 0 0 0 0 Spurious interrupts > ERR: 1 > MIS: 0 > =20 > I try to install a new MSI interrupt via rtdm package=20 > (rtdm_irq_request) with a vector number (211) given by the call to=20 > pci_msi_enable for the new PCIe device. Is that driver prepared to possibly receive an immediate IRQ after registration? Of course, that can only happen if the device's hardware is not explicitly configured to disable IRQ delivery. I'm asking as it is a common mistake to mixup IRQ arming and proper driver state initialization. > =20 > The system hangs up immediatly (sometimes I can catch the stack trace=20 > with dmesg the last reference seems to be in rt_hal package) You should try to capture a full trace via a serial console e.g., see linux/Documentation/serial-console.txt. > =20 > If I replace (for debug only!!!) this vector number by an unused=20 > "classical" vector number (for instance > 14 or 15) ... no problem. > =20 > Have you allready test this kind of configuration ... if so a little=20 > help from your part would be greatly appreciated! Another test around MSI: try to disable CONFIG_PCI_MSI and check if something changes. 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text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hello ... ... I apologize : pci_bus_read_config_word is an old 32-bit access routine ...=20 Sorry for my great haste. If I disable CONFIG_PCI_MSI, eth0 is plugged now on a classical PCI IRQ vector=20 And the init part of PEV1100 (my external PCIe device) does not work (it's normal) So CONFIG_PCI_MSI is mandatory . About PEV1100 after pci_msi_enable (allways in init part) no source of interrupt is still enabled ... So registration can be done (rtdm ...) . BUT : are the MSI interrupts (eth0 & PEV1100) are rightly dispatched ??? By viewing attached file, the last function seems to be __ipipe_restore_root And a few lines before irq_tick_handler+0x0/0x14 [vxworks_tick_time_module]* As if an interrupt source of PEV1100 has allready been enabled (obviously no). I think that MSI interrupt management is unable to make a difference between eth0 and another PCIe device MSI(coming from vector 212 OR vector 211). If I'm lucky is it fixed in 2.6.26.7 + ipipe-2.0-16 ? *vxworks_tick_time_module : it's my PEV1100 interrupt handler (you know now why I'm using Xenomai with Vx skins and in a first time working with a hal/i386 arch : 32 bit) Best regards Martial -----Original Message----- From: Rubio, Martial=20 Sent: Monday, November 24, 2008 5:55 PM To: 'Jan Kiszka' Cc: xenomai@xenomai.org; jeanfrancois.gilot@domain.hid; Dupeyrou, Gilles Subject: RE: External PCIe device: MSI interrupt install hangs up the CPU Hello everybody ... Find attached text files which seems to be very useful about my CPU hanging Perharps a problem of detection of an external dev PCIe with only MSI 64-bit access Capability (pci_bus_read_config_dword instead of pci_bus_read_config_word in pci/msi.c) with a machine which has been configured in a 32-bit mode (mandatory in my case) ? What do you think of that? ... And if TRUE what to do (it's a question for J.F) Regards to all Martial -----Original Message----- From: Jan Kiszka [mailto:jan.kiszka@domain.hid] Sent: Friday, November 21, 2008 5:46 PM To: Rubio, Martial Cc: xenomai@xenomai.org; jeanfrancois.gilot@domain.hid; Dupeyrou, Gilles Subject: Re: External PCIe device: MSI interrupt install hangs up the CPU Rubio, Martial wrote: > Hello everybody > =20 > I'm working with following config :=20 > =20 > CPU (0=3D>3) AMD Dual Core AMD Opteron > Linux version 2.6.25-pae 2.6.25 comes with the risk of missing relevant fixes that went into .26 and later. Do you have a chance to update? 2.6.27 is a bit fresh, 2.6.26.7 + ipipe-2.0-16 would be a conservative approach right now. > Xenomai : hal / i386 > Xenomai : real time nucleus v2.4.5 > =20 > Here's below the state of /proc/interrupts : > =20 > in red fonts the range of PCIe(xpress)-MSI vectors : Uuh, please don't expect the reader to have HTML rendering on for a typically text-only medium like mail. Yeah, it tends to be the other way around inside companies, I know... > =20 > hurle-bise [anaisvs](34):more /proc/interrupts > CPU0 CPU1 CPU2 CPU3 > 0: 146 0 0 0 XT-PIC-XT > timer > 1: 1039 0 0 0 XT-PIC-XT > i8042 > 2: 0 0 0 0 XT-PIC-XT > cascade > 4: 5 0 0 0 XT-PIC-XT > 5: 2 0 0 0 XT-PIC-XT > ehci_hcd:usb2 > 6: 5 0 0 0 XT-PIC-XT > floppy > 7: 16300 0 0 0 XT-PIC-XT > ohci_hcd:usb1 > 10: 155104 0 0 0 XT-PIC-XT > ioc0, sata_nv, sata_nv, ohci1394 > 11: 47305 0 0 0 XT-PIC-XT > sata_nv, HDA Intel > 14: 0 0 0 0 XT-PIC-XT > pata_amd > 15: 0 0 0 0 XT-PIC-XT > pata_amd > 212: 0 9 487 1942504 PCI-MSI-edge > eth0 > 213: 0 0 0 0 PCI-MSI-edge > shpchp > NMI: 0 0 0 0 Non-maskable > interrupts > LOC: 3722798 3722767 3722730 3722768 Local timer > interrupts > RES: 39386 37672 23570 25780 Rescheduling > interrupts > CAL: 1112 1273 1280 250 function call > interrupts > TLB: 6144 8510 6271 9025 TLB shootdowns > TRM: 0 0 0 0 Thermal event > interrupts > SPU: 0 0 0 0 Spurious interrupts > ERR: 1 > MIS: 0 > =20 > I try to install a new MSI interrupt via rtdm package > (rtdm_irq_request) with a vector number (211) given by the call to=20 > pci_msi_enable for the new PCIe device. Is that driver prepared to possibly receive an immediate IRQ after registration? Of course, that can only happen if the device's hardware is not explicitly configured to disable IRQ delivery. I'm asking as it is a common mistake to mixup IRQ arming and proper driver state initialization. > =20 > The system hangs up immediatly (sometimes I can catch the stack trace=20 > with dmesg the last reference seems to be in rt_hal package) You should try to capture a full trace via a serial console e.g., see linux/Documentation/serial-console.txt. > =20 > If I replace (for debug only!!!) this vector number by an unused=20 > "classical" vector number (for instance > 14 or 15) ... no problem. > =20 > Have you allready test this kind of configuration ... if so a little=20 > help from your part would be greatly appreciated! Another test around MSI: try to disable CONFIG_PCI_MSI and check if something changes. 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LS0tWyBlbmQgdHJhY2UgYmE5MTkxNTUyNDdkZTU0OSBdLS0tCm5vdGU6IHRpY2tbMTI0OTJdIGV4 aXRlZCB3aXRoIHByZWVtcHRfY291bnQgMgo= ------_=_NextPart_001_01C94EFF.9A743F6C-- From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <493099E2.6070502@domain.hid> Date: Sat, 29 Nov 2008 02:24:50 +0100 From: Jan Kiszka MIME-Version: 1.0 References: In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="------------enigF7A0116A0C84C95A7787D19A" Sender: jan.kiszka@domain.hid Subject: Re: [Xenomai-help] External PCIe device: MSI interrupt install hangs up the CPU List-Id: Help regarding installation and common use of Xenomai List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Rubio, Martial" Cc: jeanfrancois.gilot@domain.hid, xenomai@xenomai.org, "Dupeyrou, Gilles" This is an OpenPGP/MIME signed message (RFC 2440 and 3156) --------------enigF7A0116A0C84C95A7787D19A Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Hi Martial, sorry for the late reply, but my work queue suffered from some overflows.= =2E. Rubio, Martial wrote: > Hello ... >=20 > ... I apologize : pci_bus_read_config_word is an old 32-bit access > routine ...=20 > Sorry for my great haste. >=20 > If I disable CONFIG_PCI_MSI, eth0 is plugged now on a classical PCI IRQ= > vector=20 > And the init part of PEV1100 (my external PCIe device) does not work > (it's normal) >=20 > So CONFIG_PCI_MSI is mandatory . >=20 > About PEV1100 after pci_msi_enable (allways in init part) no source of > interrupt is still enabled ... > So registration can be done (rtdm ...) . >=20 > BUT : are the MSI interrupts (eth0 & PEV1100) are rightly dispatched ??= ? >=20 > By viewing attached file, the last function seems to be > __ipipe_restore_root > And a few lines before irq_tick_handler+0x0/0x14 > [vxworks_tick_time_module]* > As if an interrupt source of PEV1100 has allready been enabled > (obviously no). The problem is that ipipe calls into Linux services (->MSI->PCI) that are not prepared for running in ipipe context: ------------[ cut here ]------------ kernel BUG at kernel/ipipe/core.c:323! invalid opcode: 0000 [#1] PREEMPT SMP Modules linked in: vxworks_tick_time_module(P) lp parport_pc ppdev parport st ide_disk ide_cd_mod ide_core af_packet joydev nfs lockd nfs_acl sunrpc autofs4 snd_pcm_oss snd_mixer_oss snd_seq binfmt_misc snd_seq_device iptable_filter ip_tables ip6_tables x_tables fuse loop dm_mod snd_hda_intel snd_pcm snd_timer snd_page_alloc snd_hwdep snd ohci1394 sr_mod ieee1394 shpchp i2c_nforce2 i2c_core forcedeth sg pci_hotplug soundcore cdrom k8temp usbhid hid ff_memless ehci_hcd ohci_hcd sd_mod usbcore edd ext3 mbcache jbd pata_amd sata_nv libata mptsas mptscsih mptbase scsi_transport_sas scsi_mod [last unloaded: parport_pc] Pid: 12492, comm: tick Tainted: P (2.6.25-pae #10) EIP: 0060:[] EFLAGS: 00010006 CPU: 0 EIP is at __ipipe_restore_root+0x1a/0x3f EAX: c042c574 EBX: 80850000 ECX: 00000001 EDX: 05de7000 ESI: 0000004c EDI: 00000000 EBP: d94e7cd4 ESP: d94e7cd4 DS: 007b ES: 007b FS: 00d8 GS: 0033 SS: 0068 Process tick (pid: 12492, ti=3Dd94e6000 task=3Dd89f50e0 task.ti=3Dd94e600= 0)<0> I-pipe domain Linux Stack: d94e7cdc c02e9519 d94e7cf0 c02786d8 c03d8e9c 00000085 d94e7d44 d94e7d14 c0279732 0000004c 00000004 d94e7d44 00000000 00000000 da0c1000 0000004c d94e7d2c c02797b0 0000004c 00000004 d94e7d44 c03d8f00 d94e7d54 c021a89c Call Trace: [] ? _spin_unlock_irqrestore+0x18/0x36 [] ? pci_conf1_read+0xa4/0xab [] ? raw_pci_read+0x4a/0x55 [] ? pci_read+0x1d/0x22 [] ? pci_bus_read_config_dword+0x40/0x63 [] ? read_msi_msg+0x44/0xbf [] ? set_msi_irq_affinity+0x89/0xd0 [] ? __ipipe_set_irq_affinity+0xbd/0xd1 [] ? ipipe_set_irq_affinity+0x41/0x5d [] ? xnintr_attach+0x98/0x117 [] ? rtdm_irq_request+0x23/0x49 [] ? irq_tick_handler+0x0/0x14 [vxworks_tick_time_module] [] ? open_rt+0x82/0xb4 [vxworks_tick_time_module] [] ? __rt_dev_open+0x8d/0x118 [] ? sys_rtdm_open+0x46/0x55 [] ? mq_getattr+0x106/0x158 [] ? hisyscall_event+0x137/0x256 [] ? __ipipe_dispatch_event+0xc6/0x1a3 [] ? hisyscall_event+0x0/0x256 [] ? __ipipe_syscall_root+0x7f/0x112 [] ? system_call+0x29/0x4a =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D Philippe, I recall some issue that turned out to be a similar call into pci_read_config - was it resolved in any official ipipe release? However, Martial, you can likely work around it by registering the open handler of vxworks_tick_time_module only to open_nrt. That will switch the caller of rt_dev_open to secondary (Linux) mode and allow to run that service safely. Device opening is almost never time critical (and I'm planning to remove open/socket/close_rt handler for Xenomai 2.5 anywa= y). Jan --------------enigF7A0116A0C84C95A7787D19A Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.9 (GNU/Linux) Comment: Using GnuPG with SUSE - http://enigmail.mozdev.org iEYEARECAAYFAkkwmeIACgkQniDOoMHTA+nsgQCfUWxb103p5hnHW9ClttEBzhKg ePMAnjTa60zu3VdySxkM/+cT7c2AvjRE =sSFF -----END PGP SIGNATURE----- --------------enigF7A0116A0C84C95A7787D19A-- From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <493116EA.10808@domain.hid> Date: Sat, 29 Nov 2008 11:18:18 +0100 From: Philippe Gerum MIME-Version: 1.0 References: <493099E2.6070502@domain.hid> In-Reply-To: <493099E2.6070502@domain.hid> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Xenomai-help] External PCIe device: MSI interrupt install hangs up the CPU Reply-To: rpm@xenomai.org List-Id: Help regarding installation and common use of Xenomai List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: "Rubio, Martial" , jeanfrancois.gilot@domain.hid, "Dupeyrou, Gilles" , xenomai@xenomai.org Jan Kiszka wrote: > Hi Martial, > > sorry for the late reply, but my work queue suffered from some overflows... > > Rubio, Martial wrote: >> Hello ... >> >> ... I apologize : pci_bus_read_config_word is an old 32-bit access >> routine ... >> Sorry for my great haste. >> >> If I disable CONFIG_PCI_MSI, eth0 is plugged now on a classical PCI IRQ >> vector >> And the init part of PEV1100 (my external PCIe device) does not work >> (it's normal) >> >> So CONFIG_PCI_MSI is mandatory . >> >> About PEV1100 after pci_msi_enable (allways in init part) no source of >> interrupt is still enabled ... >> So registration can be done (rtdm ...) . >> >> BUT : are the MSI interrupts (eth0 & PEV1100) are rightly dispatched ??? >> >> By viewing attached file, the last function seems to be >> __ipipe_restore_root >> And a few lines before irq_tick_handler+0x0/0x14 >> [vxworks_tick_time_module]* >> As if an interrupt source of PEV1100 has allready been enabled >> (obviously no). > > The problem is that ipipe calls into Linux services (->MSI->PCI) that > are not prepared for running in ipipe context: > > ------------[ cut here ]------------ > kernel BUG at kernel/ipipe/core.c:323! > invalid opcode: 0000 [#1] PREEMPT SMP > Modules linked in: vxworks_tick_time_module(P) lp parport_pc ppdev > parport st ide_disk ide_cd_mod ide_core af_packet joydev nfs lockd > nfs_acl sunrpc autofs4 snd_pcm_oss snd_mixer_oss snd_seq binfmt_misc > snd_seq_device iptable_filter ip_tables ip6_tables x_tables fuse loop > dm_mod snd_hda_intel snd_pcm snd_timer snd_page_alloc snd_hwdep snd > ohci1394 sr_mod ieee1394 shpchp i2c_nforce2 i2c_core forcedeth sg > pci_hotplug soundcore cdrom k8temp usbhid hid ff_memless ehci_hcd > ohci_hcd sd_mod usbcore edd ext3 mbcache jbd pata_amd sata_nv libata > mptsas mptscsih mptbase scsi_transport_sas scsi_mod [last unloaded: > parport_pc] > > Pid: 12492, comm: tick Tainted: P (2.6.25-pae #10) > EIP: 0060:[] EFLAGS: 00010006 CPU: 0 > EIP is at __ipipe_restore_root+0x1a/0x3f > EAX: c042c574 EBX: 80850000 ECX: 00000001 EDX: 05de7000 > ESI: 0000004c EDI: 00000000 EBP: d94e7cd4 ESP: d94e7cd4 > DS: 007b ES: 007b FS: 00d8 GS: 0033 SS: 0068 > Process tick (pid: 12492, ti=d94e6000 task=d89f50e0 task.ti=d94e6000)<0> > I-pipe domain Linux > Stack: d94e7cdc c02e9519 d94e7cf0 c02786d8 c03d8e9c 00000085 d94e7d44 > d94e7d14 > c0279732 0000004c 00000004 d94e7d44 00000000 00000000 da0c1000 > 0000004c > d94e7d2c c02797b0 0000004c 00000004 d94e7d44 c03d8f00 d94e7d54 > c021a89c > Call Trace: > [] ? _spin_unlock_irqrestore+0x18/0x36 > [] ? pci_conf1_read+0xa4/0xab > [] ? raw_pci_read+0x4a/0x55 > [] ? pci_read+0x1d/0x22 > [] ? pci_bus_read_config_dword+0x40/0x63 > [] ? read_msi_msg+0x44/0xbf > [] ? set_msi_irq_affinity+0x89/0xd0 > [] ? __ipipe_set_irq_affinity+0xbd/0xd1 > [] ? ipipe_set_irq_affinity+0x41/0x5d > [] ? xnintr_attach+0x98/0x117 > [] ? rtdm_irq_request+0x23/0x49 > [] ? irq_tick_handler+0x0/0x14 [vxworks_tick_time_module] > [] ? open_rt+0x82/0xb4 [vxworks_tick_time_module] > [] ? __rt_dev_open+0x8d/0x118 > [] ? sys_rtdm_open+0x46/0x55 > [] ? mq_getattr+0x106/0x158 > [] ? hisyscall_event+0x137/0x256 > [] ? __ipipe_dispatch_event+0xc6/0x1a3 > [] ? hisyscall_event+0x0/0x256 > [] ? __ipipe_syscall_root+0x7f/0x112 > [] ? system_call+0x29/0x4a > ======================= > > Philippe, I recall some issue that turned out to be a similar call into > pci_read_config - was it resolved in any official ipipe release? > Yes, this one is a well-known issue. And no, this has not been solved yet, mainly because the x86 io_apic and MSI code has been in perpetual state of flux since ages, so I did not want to fiddle with it until the kernel folks eventually made their mind about a stable implementation. I plan to address this in 2.6.28/2.6.29, depending on my work load, unless someone else picks that earlier. ATM, I-pipe generic and powerpc optimizations + Xenomai scheduling classes support drain most of my available time, unfortunately. > However, Martial, you can likely work around it by registering the open > handler of vxworks_tick_time_module only to open_nrt. That will switch > the caller of rt_dev_open to secondary (Linux) mode and allow to run > that service safely. Device opening is almost never time critical (and > I'm planning to remove open/socket/close_rt handler for Xenomai 2.5 anyway). > > Jan > -- Philippe. From mboxrd@z Thu Jan 1 00:00:00 1970 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Date: Mon, 1 Dec 2008 17:33:41 +0100 Message-ID: In-Reply-To: <493099E2.6070502@domain.hid> From: "Rubio, Martial" Subject: Re: [Xenomai-help] External PCIe device: MSI interrupt install hangs up the CPU List-Id: Help regarding installation and common use of Xenomai List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: jan.kiszka@domain.hid Cc: jeanfrancois.gilot@domain.hid, xenomai@xenomai.org, "Dupeyrou, Gilles" Hi Jan ... ... Thanks a lot for your reply ... And the workaround is OK! 2 little last precisions about this topic :=20 -is it necessary to rename all the "rt"'s entry points as "nrt"'s entry points (close,read,write,ioctl) ? -is the interrupt handler "vxworks_tick_time_module" (when a HW source of PEV1100 will be enable)=20 running in Linux (not critical) mode ? =20 It's very easy (by looking at the name of the interrupt handler) to know why I ask these questions : vxworks_tick_time_module is waiting for an external pulse at 1 ms (and other MSI VME interrupts of course) provided by an external PCIe device PEV1100 in order to announce tick and so schedule an 'old' VME real time=20 Multi-cpu Application (so I'm using also Xenomai VxWorks skins for the migration in multi-core environment) ... Only VME slave boards will be stay in the distant crate! It's perharps a little bit fresh ... But it must go right !!! Regards=20 Martial=20 -----Original Message----- From: jan.kiszka@domain.hid [mailto:jan.kiszka@domain.hid Sent: Saturday, November 29, 2008 2:25 AM To: Rubio, Martial Cc: jeanfrancois.gilot@domain.hid; xenomai@xenomai.org; Dupeyrou, Gilles; Philippe Gerum Subject: Re: External PCIe device: MSI interrupt install hangs up the CPU Hi Martial, sorry for the late reply, but my work queue suffered from some overflows... Rubio, Martial wrote: > Hello ... >=20 > ... I apologize : pci_bus_read_config_word is an old 32-bit access=20 > routine ... > Sorry for my great haste. >=20 > If I disable CONFIG_PCI_MSI, eth0 is plugged now on a classical PCI=20 > IRQ vector And the init part of PEV1100 (my external PCIe device) does > not work (it's normal) >=20 > So CONFIG_PCI_MSI is mandatory . >=20 > About PEV1100 after pci_msi_enable (allways in init part) no source of > interrupt is still enabled ... > So registration can be done (rtdm ...) . >=20 > BUT : are the MSI interrupts (eth0 & PEV1100) are rightly dispatched ??? >=20 > By viewing attached file, the last function seems to be=20 > __ipipe_restore_root And a few lines before irq_tick_handler+0x0/0x14 > [vxworks_tick_time_module]* > As if an interrupt source of PEV1100 has allready been enabled=20 > (obviously no). The problem is that ipipe calls into Linux services (->MSI->PCI) that are not prepared for running in ipipe context: ------------[ cut here ]------------ kernel BUG at kernel/ipipe/core.c:323! invalid opcode: 0000 [#1] PREEMPT SMP Modules linked in: vxworks_tick_time_module(P) lp parport_pc ppdev parport st ide_disk ide_cd_mod ide_core af_packet joydev nfs lockd nfs_acl sunrpc autofs4 snd_pcm_oss snd_mixer_oss snd_seq binfmt_misc snd_seq_device iptable_filter ip_tables ip6_tables x_tables fuse loop dm_mod snd_hda_intel snd_pcm snd_timer snd_page_alloc snd_hwdep snd ohci1394 sr_mod ieee1394 shpchp i2c_nforce2 i2c_core forcedeth sg pci_hotplug soundcore cdrom k8temp usbhid hid ff_memless ehci_hcd ohci_hcd sd_mod usbcore edd ext3 mbcache jbd pata_amd sata_nv libata mptsas mptscsih mptbase scsi_transport_sas scsi_mod [last unloaded: parport_pc] Pid: 12492, comm: tick Tainted: P (2.6.25-pae #10) EIP: 0060:[] EFLAGS: 00010006 CPU: 0 EIP is at __ipipe_restore_root+0x1a/0x3f EAX: c042c574 EBX: 80850000 ECX: 00000001 EDX: 05de7000 ESI: 0000004c EDI: 00000000 EBP: d94e7cd4 ESP: d94e7cd4 DS: 007b ES: 007b FS: 00d8 GS: 0033 SS: 0068 Process tick (pid: 12492, ti=3Dd94e6000 task=3Dd89f50e0 task.ti=3Dd94e6000)<0> I-pipe domain Linux Stack: d94e7cdc c02e9519 d94e7cf0 c02786d8 c03d8e9c 00000085 d94e7d44 d94e7d14 c0279732 0000004c 00000004 d94e7d44 00000000 00000000 da0c1000 0000004c d94e7d2c c02797b0 0000004c 00000004 d94e7d44 c03d8f00 d94e7d54 c021a89c Call Trace: [] ? _spin_unlock_irqrestore+0x18/0x36 [] ? pci_conf1_read+0xa4/0xab [] ? raw_pci_read+0x4a/0x55 [] ? pci_read+0x1d/0x22 [] ? pci_bus_read_config_dword+0x40/0x63 [] ? read_msi_msg+0x44/0xbf [] ? set_msi_irq_affinity+0x89/0xd0 [] ? __ipipe_set_irq_affinity+0xbd/0xd1 [] ? ipipe_set_irq_affinity+0x41/0x5d [] ? xnintr_attach+0x98/0x117 [] ? rtdm_irq_request+0x23/0x49 [] ? irq_tick_handler+0x0/0x14 [vxworks_tick_time_module] [] ? open_rt+0x82/0xb4 [vxworks_tick_time_module] [] ? __rt_dev_open+0x8d/0x118 [] ? sys_rtdm_open+0x46/0x55 [] ? mq_getattr+0x106/0x158 [] ? hisyscall_event+0x137/0x256 [] ? __ipipe_dispatch_event+0xc6/0x1a3 [] ? hisyscall_event+0x0/0x256 [] ? __ipipe_syscall_root+0x7f/0x112 [] ? system_call+0x29/0x4a =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D Philippe, I recall some issue that turned out to be a similar call into pci_read_config - was it resolved in any official ipipe release? However, Martial, you can likely work around it by registering the open handler of vxworks_tick_time_module only to open_nrt. That will switch the caller of rt_dev_open to secondary (Linux) mode and allow to run that service safely. Device opening is almost never time critical (and I'm planning to remove open/socket/close_rt handler for Xenomai 2.5 anyway). Jan From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <49346FD3.8050609@domain.hid> Date: Tue, 02 Dec 2008 00:14:27 +0100 From: Jan Kiszka MIME-Version: 1.0 References: In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="------------enig0D22775613A57C4E247CCE24" Sender: jan.kiszka@domain.hid Subject: Re: [Xenomai-help] External PCIe device: MSI interrupt install hangs up the CPU List-Id: Help regarding installation and common use of Xenomai List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Rubio, Martial" Cc: jeanfrancois.gilot@domain.hid, xenomai@xenomai.org, "Dupeyrou, Gilles" This is an OpenPGP/MIME signed message (RFC 2440 and 3156) --------------enig0D22775613A57C4E247CCE24 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Rubio, Martial wrote: > Hi Jan ... >=20 > ... Thanks a lot for your reply ... And the workaround is OK! >=20 > 2 little last precisions about this topic :=20 >=20 > -is it necessary to rename all the "rt"'s entry points as > "nrt"'s entry points (close,read,write,ioctl) ? For close, yes, but the rest should be fine - otherwise the problem is fatal for you. Changing the rest, which is likely supposed to do the critical work, will leave you without any improvement over plain Linux. I said "should" because there is the risk that some other code paths of PCIe MSI handling triggers the bug report as well. > -is the interrupt handler "vxworks_tick_time_module" (when a HW > source of PEV1100 will be enable)=20 > running in Linux (not critical) mode ? =20 Is that the handler you register with RTDM? Then no, it will be run over the primary domain, ie. Xenomai. >=20 > It's very easy (by looking at the name of the interrupt handler) to kno= w > why I ask these questions : > vxworks_tick_time_module is waiting for an external pulse at 1 ms (and > other MSI VME interrupts of course) > provided by an external PCIe device PEV1100 in order to announce tick > and so schedule an 'old' VME real time=20 > Multi-cpu Application (so I'm using also Xenomai VxWorks skins for the > migration in multi-core environment) > ... Only VME slave boards will be stay in the distant crate! >=20 > It's perharps a little bit fresh ... But it must go right !!! >=20 > Regards=20 >=20 > Martial=20 >=20 Jan --------------enig0D22775613A57C4E247CCE24 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.9 (GNU/Linux) Comment: Using GnuPG with SUSE - http://enigmail.mozdev.org iEYEARECAAYFAkk0b9cACgkQniDOoMHTA+keOwCeLVHFTSeowiVPsomNzfhnb6Zo jwwAnjRGR2XjEG0CDd/5LzLQg1FwBoSe =Nvm/ -----END PGP SIGNATURE----- --------------enig0D22775613A57C4E247CCE24--