[Xenomai-help] SMP support for two ppc405 cores?

[Xenomai-help] SMP support for two ppc405 cores?

[saâdia dhouib]

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Hi,
I work on an xilinx development board (xupv2p) which has two ppc405 cores.
I want to know if xenomai can schedule tasks on the two cores ?
And is there some document that explains how is SMP implemented in Xenomai.
Thanks a lot

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Re: [Xenomai-help] SMP support for two ppc405 cores?

[Philippe Gerum]

saâdia dhouib wrote:
> Hi,
> I work on an xilinx development board (xupv2p) which has two ppc405 cores.
> I want to know if xenomai can schedule tasks on the two cores ?

Xenomai depends on Linux to support SMP first.

Since there is no cache coherency on this board, supporting SMP (sort of,
sub-optimal form) is a braindamage albeit possible task, but I doubt the Xilinx
kernel tree provides it already. Does it?

So the answer is likely no, Xenomai won't support your board in full dual core
mode, since Xenomai assumes cache coherency is available in SMP mode.

Now, you could port Xenomai to your board without Linux underneath, but you
would still be hit by the cache coherency issue.

> And is there some document that explains how is SMP implemented in Xenomai.

Well, ... No.

> Thanks a lot
> 
> 
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-- 
Philippe.