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aaDl2+0dgf7n973BenwhD3MpcexAE61wC6N2w4L3BmNBMmSz5U8MI7nmZo2Px6GHRZB1g1GbOUR g2OF0FI7xo/B1Z7qLA/LqQoto2jlBn5TzLwo2pXZgi1qe6p/XGexog1fI90Vy4NSLYsPoApX24n dSKKos3UppufqJRsvmeqlFCGWTzORV3UO1FrcaBzYkL3lJoiJWITHXO6alqfU+KFkCUSgnOe1ww 51S7TeWyWuFMpVbpjWDdQ45W+YLnJB20YBBT4PuGjKweJ3lKwNiJYLmqGaQvxxSwsFBvr2A96Ip pmGcM10Msp1zi/V7ymwyvkUgPHcBshbhO+cYhE9CtCcoXmyD5+dCUP0mmohMCfIgOSv1wGNX6KE QuPvM4rdZhdBuJdPMvQ== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDE2OCBTYWx0ZWRfX4o4fcgWycBbZ 7QiJIVD4FAPWgz79yMEPEoz6GelLl4in0Q4t+GsgK0S4XnRZrhIq0oKQUuNnv8R1Kuvnq88dsw2 LTp3l4xvdvJJQogRoAkxjTwGBhTfuR8lgC+6u+8XbFdbOIb4jeZu X-Proofpoint-ORIG-GUID: 5AmWKWSP1AQb2QuWjrDL5x3U6X5aQz_U X-Authority-Analysis: v=2.4 cv=A/n5rKWG c=1 sm=1 tr=0 ts=6aa92e9e cx=c_pps a=OOZaFjgC48PWsiFpTAqLcw==:117 a=OOZaFjgC48PWsiFpTAqLcw==:17 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=z/mQ4Ysz8XfWz/Q5cLBRGdckG28=:19 a=lCpzRmAYbLLaTzLvsPZ7Mbvzbb8=:19 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=GoEa3M9JfhUA:10 a=VkNPw1HP01LnGYTKEx00:22 a=jiCTI4zE5U7BLdzWsZGv:22 a=EIcjfB9IiI4px24ztqRk:22 a=IIitxqE1_MR7lqrvF2UA:9 a=QEXdDO2ut3YA:10 On 11/09/2026 05:09, Yonghong Song wrote: > arm64 requires an argument whose alignment is twice the register size to > start on an even-numbered argument register, so such an argument arriving > when the next free register is an odd one leaves that register unused: > > u64 f_odd(u64 a, __int128 v, u64 b); > > passes a in x0, v in x2:x3 -- skipping x1 -- and b in x4. The x86-64 ABI > has no such rule and packs v into rsi:rdx instead. > > Signed-off-by: Yonghong Song > --- > dwarf_loader.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++--- > dwarves.h | 1 + > 2 files changed, 51 insertions(+), 3 deletions(-) > > diff --git a/dwarf_loader.c b/dwarf_loader.c > index 61ef52f..81c2076 100644 > --- a/dwarf_loader.c > +++ b/dwarf_loader.c > @@ -1501,6 +1501,23 @@ static bool arch__agg_use_two_regs(const GElf_Ehdr *ehdr) > } > } > > +/* > + * Some ABIs require an argument whose alignment is twice the register size to > + * start on an even-numbered argument register, leaving a hole when the next > + * free register is an odd one. For example, on arm64, > + * u64 f(u64 a, __int128 v, u64 b) > + * passes a in x0, v in x2:x3 -- skipping x1 -- and b in x4. > + */ > +static bool arch__arg_align_two_regs(const GElf_Ehdr *ehdr) > +{ > + switch (ehdr->e_machine) { > + case EM_AARCH64: > + return true; > + default: > + return false; > + } > +} > + > static struct template_type_param *template_type_param__new(Dwarf_Die *die, struct cu *cu, struct conf_load *conf) > { > struct template_type_param *ttparm = tag__alloc(cu, sizeof(*ttparm)); > @@ -3634,6 +3651,28 @@ static int parameter__abi_slots(const struct parameter *parm, const struct cu *c > return slots > 0 ? slots : 1; > } > > +static int parameter__abi_reg_align(const struct parameter *parm, const struct cu *cu) > +{ > + struct tag *type; > + > + if (!cu->arg_align_two_regs || parm->type_byte_size <= cu->addr_size) > + return 1; > + > + type = tag__strip_typedefs_and_modifiers(&parm->tag, cu); > + if (type == NULL) > + return 1; > + > + return tag__natural_alignment(type, cu) > cu->addr_size ? 2 : 1; > +} There is a problem here (identified by AI) which, while not impacting on kernel signatures would I think be worth fixing. It stems from the fact that we can have non general-purpose registers > pointer size in a function signatures, and if they are present they do not advance the general purpose register number by 2 in the way that dedicating 2 general-purpose registers would. Example signature: u64 f_fp(u64 a, long double v, u64 b); To catch this, have a test in parameter__abi_reg_align() if (!parameter__uses_gpr_bank(parm, cu)) return 1; static bool parameter__uses_gpr_bank(const struct parameter *parm, const struct cu *cu) { struct tag *type = tag__strip_typedefs_and_modifiers(&parm->tag, cu); if (!type) return false; /* Scalars represented by FP/SIMD registers have their own allocation bank. */ if (tag__is_base_type(type) && base_type__is_float(tag__base_type(type))) return false; /* Also exclude vector/SIMD types if dwarves represents them distinctly. */ if (tag__is_vector(type)) return false; return true; } So given that the fix is small, I think this would be worth doing. > + > +static int parameter__align_reg_idx(const struct parameter *parm, int reg_idx, > + const struct cu *cu) > +{ > + int align = parameter__abi_reg_align(parm, cu); > + > + return (reg_idx + align - 1) & ~(align - 1); > +} > + > static bool parameter__has_piece_info(const struct parameter *parm) > { > return parm->first_reg_fields || parm->second_reg_fields; > @@ -3653,7 +3692,7 @@ static bool ftype__next_parameter_preserves_slots(struct ftype *ftype, struct pa > if (!next || next->loc_reg == PARAMETER_UNKNOWN_REG) > return false; > > - next_reg_idx = reg_idx + slots; > + next_reg_idx = parameter__align_reg_idx(next, reg_idx + slots, cu); > return next_reg_idx < cu->nr_register_params && > next->loc_reg == cu->register_params[next_reg_idx]; > } > @@ -3702,6 +3741,7 @@ static void function__match_clang_parameter_locations(struct ftype *ftype, struc > if (pos->passed_in_memory) > continue; > > + reg_idx = parameter__align_reg_idx(pos, reg_idx, cu); > if (reg_idx >= cu->nr_register_params) > break; > > @@ -3732,11 +3772,17 @@ static void function__analyze_parameter_locations(struct function *fn, struct cu > > ftype__for_each_parameter(ftype, pos) { > bool consumes_register = true; > - bool regs_available = reg_idx < cu->nr_register_params; > + bool regs_available; > int slots = parameter__abi_slots(pos, cu); > - int expected_reg = regs_available ? cu->register_params[reg_idx] : -1; > + int expected_reg; > int reg_slots = pos->passed_in_memory ? 1 : slots; > > + if (!pos->passed_in_memory) > + reg_idx = parameter__align_reg_idx(pos, reg_idx, cu); > + > + regs_available = reg_idx < cu->nr_register_params; > + expected_reg = regs_available ? cu->register_params[reg_idx] : -1; > + > if (pos->has_loc) { > if (true_sig_enabled && pos->loc_const_value) { > pos->optimized = 1; > @@ -4467,6 +4513,7 @@ static int cu__set_common(struct cu *cu, struct conf_load *conf, > cu->little_endian = ehdr.e_ident[EI_DATA] == ELFDATA2LSB; > cu->nr_register_params = arch__nr_register_params(&ehdr); > cu->agg_use_two_regs = arch__agg_use_two_regs(&ehdr); > + cu->arg_align_two_regs = arch__arg_align_two_regs(&ehdr); > arch__set_register_params(&ehdr, cu); > return 0; > } > diff --git a/dwarves.h b/dwarves.h > index df77f1e..70adbbf 100644 > --- a/dwarves.h > +++ b/dwarves.h > @@ -304,6 +304,7 @@ struct cu { > uint8_t little_endian:1; > uint8_t producer_clang:1; > uint8_t agg_use_two_regs:1; /* An aggregate like {long a; long b;} */ > + uint8_t arg_align_two_regs:1; /* An over-aligned arg starts on an even register */ > uint8_t nr_register_params; > int register_params[ARCH_MAX_REGISTER_PARAMS]; > int functions_saved;