Re: [Qemu-devel] [PATCH] MTRR support on x86 [resend]

[Anthony Liguori <aliguori@us.ibm.com>]

Carl-Daniel Hailfinger wrote:
> The current codebase ignores MTRR (Memory Type Range Register)
> configuration writes and reads because Qemu does not implement caching.
> All BIOS/firmware in know of for x86 do implement a mode called
> Cache-as-RAM (CAR) which locks down the CPU cache lines and uses the CPU
> cache like RAM before RAM is enabled. Qemu assumes RAM is accessible
> from the start, but it would be nice to be able to run real
> BIOS/firmware in Qemu. For that, we need CAR support and for CAR support
> we have to support MTRRs.
>
> This patch is a first step in that direction. MTRRs are MSRs supported
> by all recent x86 CPUs, even old i586. Besides influencing cache, the
> MTRRs can be written and read back, so discarding MTRR writes violates
> the expectations of existing code out there.
>
> An added benefit of this patch is that it fixes the following Linux
> kernel error message present in recent kernels (provided the BIOS has
> the recent MTRR patches applied):
> ------------[ cut here ]------------
> WARNING: at arch/x86/kernel/cpu/mtrr/main.c:1500 mtrr_trim_uncached_memory+0x382/0x384()
> WARNING: strange, CPU MTRRs all blank?
> Modules linked in:
> Supported: Yes
> Pid: 0, comm: swapper Not tainted 2.6.27.7-9-default #1
>  [<c0106570>] dump_trace+0x6b/0x249
>  [<c01070a5>] show_trace+0x20/0x39
>  [<c0343c02>] dump_stack+0x71/0x76
>  [<c012acb2>] warn_slowpath+0x6f/0x90
>  [<c0542f8f>] mtrr_trim_uncached_memory+0x382/0x384
>  [<c053f24d>] setup_arch+0x40d/0x639
>  [<c053a6ac>] start_kernel+0x6b/0x31f
>  =======================
> ---[ end trace 4eaa2a86a8e2da22 ]---
>
> Handle common x86 MTRR reads and writes, but don't act on them.
>
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
>   

Applied.  Thanks.

Regards,

Anthony Liguori

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