Re: [PATCH 3/3] ioemu: use the sysfs interface to enable the PCI ROM

["Zhao, Yu" <yu.zhao@intel.com>]

Kouya,

I remember the kernel would write base address combined with enable bit 
into ROM BAR when writing '1' to the sysfs, but looks like it doesn't do 
so (the kernel only does this when user maps rom entry through sysfs).

I'll send a patch to fix this.

Thanks,
Yu

Kouya Shimura wrote:
> Hi Yu,
> 
> This patch disabled the hvm from reading the PCI option ROM again.
> Should the kernel(dom0) know the BAR of hidden PCI?
> I don't understand what the problem is. Writing to the real BAR
> of option ROM looks harmless.
> 
> The cause of original problem, which I fixed before about invisibility
> of option ROM, is not the enable flag(bit0) but the address(=0) of ROM
> BAR. Thus your patch looks pointless.
> 
> If you intend to map the ROM in dom0, writing "1" to sysfs is not
> enough. At least, trying to read the ROM is necessary to map the ROM.
> (although nothing can be read in dom0.)
> 
> Thanks,
> Kouya
> 
> Yu Zhao writes:
>> Writing the base address directly to the ROM BAR may cause problem
>> since the kernel is not aware of the operation.
>>
>> Signed-off-by: Yu Zhao <yu.zhao@intel.com>
>> ---
>>  hw/pass-through.c |   25 +++++++++++++++++++++++--
>>  1 files changed, 23 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/pass-through.c b/hw/pass-through.c
>> index 207bdf0..e76a3c3 100644
>> --- a/hw/pass-through.c
>> +++ b/hw/pass-through.c
>> @@ -1447,6 +1447,27 @@ exit:
>>      return val;
>>  }
>>  
>> +static int pt_pci_enable_rom(struct pci_dev *dev)
>> +{
>> +    FILE *fp;
>> +    char path[PATH_MAX];
>> +
>> +    sprintf(path, "/sys/bus/pci/devices/%04x:%02x:%02x.%x/rom",
>> +            dev->domain, dev->bus, dev->dev, dev->func);
>> +
>> +    fp = fopen(path, "w");
>> +    if ( !fp )
>> +    {
>> +        PT_LOG("Can't open %s: %s\n", path, strerror(errno));
>> +        return -1;
>> +    }
>> +
>> +    fprintf(fp, "1");
>> +    fclose(fp);
>> +
>> +    return 0;
>> +}
>> +
>>  static void pt_libpci_fixup(struct pci_dev *dev)
>>  {
>>  #if PCI_LIB_VERSION < 0x030100
>> @@ -1526,8 +1547,8 @@ static int pt_register_regions(struct pt_dev *assigned_device)
>>  
>>          /* Re-set BAR reported by OS, otherwise ROM can't be read. */
>>          if ( (pci_dev->rom_base_addr & PCI_ROM_ADDRESS_MASK) == 0 )
>> -            pci_write_long(pci_dev, PCI_ROM_ADDRESS,
>> -                           (pci_dev->rom_base_addr | PCI_ROM_ADDRESS_MASK));
>> +            if ( pt_pci_enable_rom(pci_dev) )
>> +                return -1;
>>  
>>          assigned_device->bases[PCI_ROM_SLOT].e_physbase =
>>              pci_dev->rom_base_addr;
>> -- 
>> 1.5.6.4
>>
>>
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