From: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
To: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: [PATCH revised] MIPS: Enable prefetch option for VR5500 processor
Date: Wed, 18 Mar 2009 09:04:01 +0900 [thread overview]
Message-ID: <49C03A71.1070905@necel.com> (raw)
In-Reply-To: <49BFD438.3070805@ru.mvista.com>
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
Hi,
Sergei Shtylyov wrote:
> Why not:
>
> c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;
Thank you, patch revised.
Shinya
arch/mips/mm/c-r4k.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index c43f4b2..871e828 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void)
c->dcache.ways = 2;
c->dcache.waybit = 0;
- c->options |= MIPS_CPU_CACHE_CDEX_P;
+ c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;
break;
case CPU_TX49XX:
prev parent reply other threads:[~2009-03-18 0:03 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-03-03 9:05 [PATCH] MIPS: NEC VR5500 processor support fixup Shinya Kuribayashi
2009-03-11 14:09 ` Ralf Baechle
2009-03-17 6:32 ` MIPS: Enable prefetch option for VR5500 processor Shinya Kuribayashi
2009-03-17 16:47 ` Sergei Shtylyov
2009-03-18 0:04 ` Shinya Kuribayashi [this message]
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