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diff for duplicates of <49CB31CB.2010704@grandegger.com>

diff --git a/a/1.txt b/N1/1.txt
index 0177b10..4e8ff06 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,5 +1,5 @@
 Grant Likely wrote:
-> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger <wg@grandegger.com> wrote:
+> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
 >> Grant Likely wrote:
 >>> For the chip offset, it's not clear what the meaning is.  First, does
 >>> the UPM controller support access of multiple chips simultaneously?
diff --git a/a/content_digest b/N1/content_digest
index 0641b85..1b321ee 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -5,17 +5,18 @@
  "ref\0fa686aa40903251048g479d63f8i5a715defdbfc33d4@mail.gmail.com\0"
  "ref\049CA9899.30604@grandegger.com\0"
  "ref\0fa686aa40903252209r52a1bc1cn995a7da16bc3527f@mail.gmail.com\0"
- "From\0Wolfgang Grandegger <wg@grandegger.com>\0"
+ "ref\0fa686aa40903252209r52a1bc1cn995a7da16bc3527f-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0"
+ "From\0Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>\0"
  "Subject\0Re: [PATCH v3 3/4] powerpc: NAND: FSL UPM: document new bindings\0"
  "Date\0Thu, 26 Mar 2009 08:42:03 +0100\0"
- "To\0Grant Likely <grant.likely@secretlab.ca>\0"
- "Cc\0linuxppc-dev@ozlabs.org"
-  devicetree-discuss list <devicetree-discuss@ozlabs.org>
- " linux-mtd@lists.infradead.org\0"
+ "To\0Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>\0"
+ "Cc\0linuxppc-dev-mnsaURCQ41sdnm+yROfE0A@public.gmane.org"
+  devicetree-discuss list <devicetree-discuss-mnsaURCQ41sdnm+yROfE0A@public.gmane.org>
+ " linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "Grant Likely wrote:\n"
- "> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger <wg@grandegger.com> wrote:\n"
+ "> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:\n"
  ">> Grant Likely wrote:\n"
  ">>> For the chip offset, it's not clear what the meaning is.  First, does\n"
  ">>> the UPM controller support access of multiple chips simultaneously?\n"
@@ -71,4 +72,4 @@
  "> g.\n"
  >
 
-b37a70d1eaf2307814485e29a0eb96fa11cbee98ca79c74ef4b6c59b6ca0cbcd
+2b365c9e22c1598eb4ca7677ae99097fde39af7edacc94143b8f13602513d499

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