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diff for duplicates of <49CBA062.5050000@grandegger.com>

diff --git a/a/1.txt b/N1/1.txt
index bdcea85..de784b3 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,7 +1,7 @@
 Grant Likely wrote:
-> On Thu, Mar 26, 2009 at 1:42 AM, Wolfgang Grandegger <wg@grandegger.com> wrote:
+> On Thu, Mar 26, 2009 at 1:42 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
 >> Grant Likely wrote:
->>> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger <wg@grandegger.com> wrote:
+>>> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
 >>>> Grant Likely wrote:
 >>>>> For the chip offset, it's not clear what the meaning is.  First, does
 >>>>> the UPM controller support access of multiple chips simultaneously?
diff --git a/a/content_digest b/N1/content_digest
index ccd01a7..f9ed3eb 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -7,19 +7,20 @@
  "ref\0fa686aa40903252209r52a1bc1cn995a7da16bc3527f@mail.gmail.com\0"
  "ref\049CB31CB.2010704@grandegger.com\0"
  "ref\0fa686aa40903260727y3266e394g5e574680fe70bbbf@mail.gmail.com\0"
- "From\0Wolfgang Grandegger <wg@grandegger.com>\0"
+ "ref\0fa686aa40903260727y3266e394g5e574680fe70bbbf-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0"
+ "From\0Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>\0"
  "Subject\0Re: [PATCH v3 3/4] powerpc: NAND: FSL UPM: document new bindings\0"
  "Date\0Thu, 26 Mar 2009 16:33:54 +0100\0"
- "To\0Grant Likely <grant.likely@secretlab.ca>\0"
- "Cc\0linuxppc-dev@ozlabs.org"
-  devicetree-discuss list <devicetree-discuss@ozlabs.org>
- " linux-mtd@lists.infradead.org\0"
+ "To\0Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>\0"
+ "Cc\0linuxppc-dev-mnsaURCQ41sdnm+yROfE0A@public.gmane.org"
+  devicetree-discuss list <devicetree-discuss-mnsaURCQ41sdnm+yROfE0A@public.gmane.org>
+ " linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "Grant Likely wrote:\n"
- "> On Thu, Mar 26, 2009 at 1:42 AM, Wolfgang Grandegger <wg@grandegger.com> wrote:\n"
+ "> On Thu, Mar 26, 2009 at 1:42 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:\n"
  ">> Grant Likely wrote:\n"
- ">>> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger <wg@grandegger.com> wrote:\n"
+ ">>> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:\n"
  ">>>> Grant Likely wrote:\n"
  ">>>>> For the chip offset, it's not clear what the meaning is.  First, does\n"
  ">>>>> the UPM controller support access of multiple chips simultaneously?\n"
@@ -96,4 +97,4 @@
  "\n"
  Wolfgang.
 
-e7ca291e62aacce02ab04f2c88a4722d57b7400c396dce81e2c7664b34b05c7c
+8b9004ea311ef19a2d8d9e0f21fa05059bc179fe0fa143d23c61fbbdcebabd88

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