From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Lo1nk-0007EK-9k for qemu-devel@nongnu.org; Sun, 29 Mar 2009 16:40:16 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Lo1nf-0007Ar-TC for qemu-devel@nongnu.org; Sun, 29 Mar 2009 16:40:15 -0400 Received: from [199.232.76.173] (port=51379 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Lo1nf-0007Al-Ov for qemu-devel@nongnu.org; Sun, 29 Mar 2009 16:40:11 -0400 Received: from moutng.kundenserver.de ([212.227.126.187]:59827) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Lo1nf-0001nG-8N for qemu-devel@nongnu.org; Sun, 29 Mar 2009 16:40:11 -0400 Message-ID: <49CFDC9E.6080405@mail.berlios.de> Date: Sun, 29 Mar 2009 22:39:58 +0200 From: Stefan Weil MIME-Version: 1.0 Subject: Re: [Qemu-devel] [6936] target-mips: optimize gen_compute_branch() References: In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, Aurelien Jarno Aurelien Jarno schrieb: > Revision: 6936 > http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6936 > Author: aurel32 > Date: 2009-03-29 01:18:52 +0000 (Sun, 29 Mar 2009) > Log Message: > ----------- > target-mips: optimize gen_compute_branch() > > Signed-off-by: Aurelien Jarno > > Modified Paths: > -------------- > trunk/target-mips/cpu.h > trunk/target-mips/machine.c > trunk/target-mips/translate.c > > Modified: trunk/target-mips/cpu.h > =================================================================== > --- trunk/target-mips/cpu.h 2009-03-29 01:18:43 UTC (rev 6935) > +++ trunk/target-mips/cpu.h 2009-03-29 01:18:52 UTC (rev 6936) > @@ -443,7 +443,7 @@ > #define MIPS_HFLAG_BL 0x0C00 /* Likely branch */ > #define MIPS_HFLAG_BR 0x1000 /* branch to register (can't link TB) */ > target_ulong btarget; /* Jump / branch target */ > - int bcond; /* Branch condition (if needed) */ > + target_ulong bcond; /* Branch condition (if needed) */ > > int SYNCI_Step; /* Address step size for SYNCI */ > int CCRes; /* Cycle count resolution/divisor */ > > Modified: trunk/target-mips/machine.c > =================================================================== > --- trunk/target-mips/machine.c 2009-03-29 01:18:43 UTC (rev 6935) > +++ trunk/target-mips/machine.c 2009-03-29 01:18:52 UTC (rev 6936) > @@ -91,7 +91,8 @@ > qemu_put_sbe32s(f, &env->error_code); > qemu_put_be32s(f, &env->hflags); > qemu_put_betls(f, &env->btarget); > - qemu_put_sbe32s(f, &env->bcond); > + i = env->bcond; > + qemu_put_sbe32s(f, &i); > bcond is now target_ulong (32 or 64 bit target), i is int. Are the upper 32 bits of bcond not needed? > > /* Save remaining CP1 registers */ > qemu_put_sbe32s(f, &env->CP0_Index); > @@ -240,7 +241,8 @@ > qemu_get_sbe32s(f, &env->error_code); > qemu_get_be32s(f, &env->hflags); > qemu_get_betls(f, &env->btarget); > - qemu_get_sbe32s(f, &env->bcond); > + qemu_get_sbe32s(f, &i); > + env->bcond = i; > See above. > > /* Load remaining CP1 registers */ > qemu_get_sbe32s(f, &env->CP0_Index); > > Regards Stefan